stoneyridge: Enable IO CF9 in bootblock
If IO CF9 is not enabled, hard_reset() won't do anything in bootblock or verstage. BUG=b:110817463 TEST=built on grunt and made sure that hard_reset() reboots. Change-Id: I5f091077a17db3dfe5b8e8367163312db6828360 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/27267 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -32,6 +32,8 @@
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#define PSP_MAILBOX_BAR_EN 0x10
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/* Power management registers: 0xfed80300 or index/data at IO 0xcd6/cd7 */
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#define PM_DECODE_EN 0x00
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#define CF9_IO_EN BIT(1)
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#define PM_ISA_CONTROL 0x04
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#define MMIO_EN BIT(1)
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#define PM_PCI_CTRL 0x08
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@ -368,6 +368,13 @@ void sb_acpi_mmio_decode(void)
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outb(byte, PM_DATA);
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}
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static void sb_enable_cf9_io(void)
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{
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uint32_t reg = pm_read32(PM_DECODE_EN);
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pm_write32(PM_DECODE_EN, reg | CF9_IO_EN);
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}
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void sb_clk_output_48Mhz(void)
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{
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u32 ctrl;
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@ -542,6 +549,7 @@ void bootblock_fch_early_init(void)
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sb_spibase();
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sb_disable_4dw_burst(); /* Must be disabled on CZ(ST) */
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sb_acpi_mmio_decode();
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sb_enable_cf9_io();
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enable_aoac_devices();
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}
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