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device/pci_early.c: Drop some guards 

With PCI_DEV() always defined it is no longer
necessary to exclude this code from building.

Change-Id: I58a6348750d240aa6024599f7b1af1449f31e8ac
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2019-01-23 16:02:28 +02:00
parent 371f04811e
commit 5b14116a04
4 changed files with 5 additions and 12 deletions
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4
src/console/init.c
View File

@ -74,10 +74,8 @@ asmlinkage void console_init(void)
if (IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT))
car_set_var(console_inited, 1);
#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)
if (!ENV_SMM && !ENV_RAMSTAGE)
if (IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) && !ENV_SMM && !ENV_RAMSTAGE)
pci_early_bridge_init();
#endif
console_hw_init();

3
src/device/Makefile.inc
View File

@ -13,7 +13,6 @@ ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c
ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c
ramstage-$(CONFIG_PCI) += pci_ops.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-$(CONFIG_PCI) += pci_early.c
ramstage-$(CONFIG_PCI) += pci_rom.c
ramstage-y += smbus_ops.c
@ -28,12 +27,10 @@ verstage-y += device_const.c
romstage-y += device_const.c
ramstage-y += device_const.c
ifeq ($(CONFIG_ARCH_X86),y)
bootblock-$(CONFIG_PCI) += pci_early.c
verstage-$(CONFIG_PCI) += pci_early.c
romstage-$(CONFIG_PCI) += pci_early.c
postcar-$(CONFIG_PCI) += pci_early.c
endif
subdirs-y += oprom dram

7
src/device/pci_early.c
View File

@ -18,9 +18,10 @@
#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pci_type.h>
#include <delay.h>
#if !ENV_RAMSTAGE
unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last)
{
unsigned pos = 0;
@ -68,9 +69,6 @@ unsigned pci_find_capability(pci_devfn_t dev, unsigned cap)
{
return pci_find_next_capability(dev, cap, 0);
}
#endif
#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)
static void pci_bridge_reset_secondary(pci_devfn_t p2p_bridge)
{
@ -167,4 +165,3 @@ void pci_early_bridge_init(void)
pci_early_mmio_window(p2p_bridge, CONFIG_EARLY_PCI_MMIO_BASE, 0x4000);
}
#endif /* CONFIG_EARLY_PCI_BRIDGE */

3
src/include/device/pci.h
View File

@ -143,7 +143,6 @@ unsigned int pci_find_next_capability(struct device *dev, unsigned int cap,
unsigned int pci_find_capability(struct device *dev, unsigned int cap);
#endif /* __SIMPLE_DEVICE__ */
void pci_early_bridge_init(void);
void pci_early_mmio_window(pci_devfn_t p2p_bridge, u32 mmio_base,
u32 mmio_size);
int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
@ -157,4 +156,6 @@ static inline int pci_base_address_is_memory_space(unsigned int attr)
#endif /* CONFIG_PCI */
void pci_early_bridge_init(void);
#endif /* PCI_H */