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intel/broadwell: Switch to TSC_MONOTONIC_TIMER 

Change-Id: I01b73e20c8af1b00175dc6d9ee56e6b33ac5768d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36537
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2019-11-01 10:25:50 +02:00
parent 0d6ddf8da7
commit 5b15e01035
3 changed files with 1 additions and 64 deletions
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1
src/soc/intel/broadwell/Kconfig
View File

@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select SSE2 select SSE2
select TSC_SYNC_MFENCE select TSC_SYNC_MFENCE
select UDELAY_TSC select UDELAY_TSC
select TSC_MONOTONIC_TIMER
select SOC_INTEL_COMMON select SOC_INTEL_COMMON
select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE

5
src/soc/intel/broadwell/Makefile.inc
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@ -39,11 +39,6 @@ ramstage-y += memmap.c
romstage-y += memmap.c romstage-y += memmap.c
postcar-y += memmap.c postcar-y += memmap.c
ramstage-y += minihd.c ramstage-y += minihd.c
bootblock-y += monotonic_timer.c
romstage-y += monotonic_timer.c
postcar-y += monotonic_timer.c
ramstage-y += monotonic_timer.c
smm-y += monotonic_timer.c
ramstage-y += pch.c ramstage-y += pch.c
romstage-y += pch.c romstage-y += pch.c
ramstage-y += pcie.c ramstage-y += pcie.c

59
src/soc/intel/broadwell/monotonic_timer.c
View File

@ -1,59 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <timer.h>
#include <soc/msr.h>
static struct monotonic_counter {
int initialized;
struct mono_time time;
uint32_t last_value;
} mono_counter;
static inline uint32_t read_counter_msr(void)
{
/* Even though the MSR is 64-bit it is assumed that the hardware
* is polled frequently enough to only use the lower 32-bits. */
msr_t counter_msr;
counter_msr = rdmsr(MSR_COUNTER_24_MHZ);
return counter_msr.lo;
}
void timer_monotonic_get(struct mono_time *mt)
{
uint32_t current_tick;
uint32_t usecs_elapsed;
if (!mono_counter.initialized) {
mono_counter.last_value = read_counter_msr();
mono_counter.initialized = 1;
}
current_tick = read_counter_msr();
usecs_elapsed = (current_tick - mono_counter.last_value) / 24;
/* Update current time and tick values only if a full tick occurred. */
if (usecs_elapsed) {
mono_time_add_usecs(&mono_counter.time, usecs_elapsed);
mono_counter.last_value = current_tick;
}
/* Save result. */
*mt = mono_counter.time;
}