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mb/google/poppy/variants/rammus: Disable command TriState for rammus 

This patch sets the MRC UPD "CmdTriStateDis" to disable TriState for
the rammus boards. Rammus is LPDDR3 design without RTT for CMD/CTRL.

BUG=none
TEST=Run memtester app and also webgl fishtank on the LPDDR3 kabylake
     boards and also check the margin data is proper in FSP.

Change-Id: Iee115f49ba5b36dc5b0425e9da02b58cd19b2236
Signed-off-by: Marx Wang <marx.wang@intel.com>
Reviewed-on: https://review.coreboot.org/28568
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
marxwang 2018-09-11 12:08:23 +08:00 committed by Martin Roth
parent eaca95eaf4
commit 5b5656565b
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/poppy/variants/rammus/devicetree.cb
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@ -27,6 +27,9 @@ chip soc/intel/skylake
# Enable S0ix
register "s0ix_enable" = "1"
# Disable Command TriState
register "CmdTriStateDis" = "1"
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"