util/superiotool: Add initial support for Fintek F71869AD.
Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -93,6 +93,7 @@ Bingxun Shi <bingxunshi@gmail.com>
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Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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David Bartley <dtbartle@csclub.uwaterloo.ca>
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David Hendricks <david.hendricks@gmail.com>
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Edward O'Callaghan <eocallaghan@alterapraxis.com>
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François-Regis Vuillemin <coreboot@miradou.com>
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Frieder Ferlemann <Frieder.Ferlemann@web.de>
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Idwer Vollering <idwer_v@hotmail.com>
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@ -113,4 +114,3 @@ Ulf Jordan <jordan@chalmers.se>
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Urja Rannikko <urjaman@gmail.com>
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Uwe Hermann <uwe@hermann-uwe.de>
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Ward Vandewege <ward@gnu.org>
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@ -3,6 +3,7 @@
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*
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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* Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -76,6 +77,47 @@ static const struct superio_registers reg_table[] = {
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{0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
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{0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
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{EOT}}},
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{0x0710, "F71869AD", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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{0x02,0x07,0x20,0x21,0x25,0x26,0x27,0x28,0x29,0x2a,
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0x2b,0x2c,0x2d,EOT},
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{0x00,0x00,0x08,0x14,0x00,0x00,MISC,0x38,0x6f,0x07,
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0x0f,0x00,0x28,EOT}},
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{0x0, "Floppy",
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
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{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
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{0x1, "COM1",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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{0x2, "COM2",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
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{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
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{0x3, "Parallel port",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
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{0x4, "Hardware monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x5, "Keyboard",
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{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
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{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
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{0x6, "GPIO",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
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0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
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0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
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0x90,0x91,0x92,0x93,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
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NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
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0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
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0x00,0x3f,NANA,0x00,EOT}},
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{0x7, "BSEL",
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{0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
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{0x00,0x00,0x00,0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
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{0xa, "PME, ACPI",
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{0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfe,0xff,EOT},
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{0x00,0x00,0x00,NANA,NANA,0x06,0x1c,0x1f,0x86,0x00,0x00,0x00,0x00,EOT}},
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{EOT}}},
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{0x2307, "F71889", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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