soc/amd/common: Correct SPI FIFO size check
When checking that command and data fit in the FIFO, don't count the first byte. The command doesn't go through the FIFO. TEST=confirm error (4+68>71) goes away on Mandolin BUG=b:146225550 Change-Id: Ica2ca514deea401c9c5396913087e07a12ab3cf3 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37721 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -40,7 +40,8 @@ int fch_spi_flash_cmd_write(const u8 *cmd, size_t cmd_len, const void *data, siz
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int ret;
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int ret;
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u8 buff[SPI_FIFO_DEPTH + 1];
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u8 buff[SPI_FIFO_DEPTH + 1];
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if ((cmd_len + data_len) > SPI_FIFO_DEPTH)
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/* Ensure FIFO is large enough. First byte of command does not go in the FIFO. */
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if ((cmd_len - 1 + data_len) > SPI_FIFO_DEPTH)
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return -1;
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return -1;
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memcpy(buff, cmd, cmd_len);
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memcpy(buff, cmd, cmd_len);
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memcpy(buff + cmd_len, data, data_len);
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memcpy(buff + cmd_len, data, data_len);
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