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soc/amd/common: Fix consistency in AcpiMmio arguments 

Change all arguments named "offset" to "reg" to match the others.

These should have gone into change
  69486cac7: Create AcpiMmio functionality from stoneyridge

Change-Id: Ifdd00d0a5d1e03bfa68a13eeece2d2cfd56aa39d
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32930
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marshall Dawson 2019-05-21 12:41:34 -06:00 committed by Martin Roth
parent 960964f093
commit 5b9e05501f
2 changed files with 37 additions and 37 deletions
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50
src/soc/amd/common/block/acpimmio/mmio_util.c
View File

@ -69,34 +69,34 @@ void pm_io_write32(uint8_t reg, uint32_t value)
/* smi read/write - access registers at 0xfed80200 */
uint8_t smi_read8(uint8_t offset)
uint8_t smi_read8(uint8_t reg)
{
return read8((void *)(ACPIMMIO_SMI_BASE + offset));
return read8((void *)(ACPIMMIO_SMI_BASE + reg));
}
uint16_t smi_read16(uint8_t offset)
uint16_t smi_read16(uint8_t reg)
{
return read16((void *)(ACPIMMIO_SMI_BASE + offset));
return read16((void *)(ACPIMMIO_SMI_BASE + reg));
}
uint32_t smi_read32(uint8_t offset)
uint32_t smi_read32(uint8_t reg)
{
return read32((void *)(ACPIMMIO_SMI_BASE + offset));
return read32((void *)(ACPIMMIO_SMI_BASE + reg));
}
void smi_write8(uint8_t offset, uint8_t value)
void smi_write8(uint8_t reg, uint8_t value)
{
write8((void *)(ACPIMMIO_SMI_BASE + offset), value);
write8((void *)(ACPIMMIO_SMI_BASE + reg), value);
}
void smi_write16(uint8_t offset, uint16_t value)
void smi_write16(uint8_t reg, uint16_t value)
{
write16((void *)(ACPIMMIO_SMI_BASE + offset), value);
write16((void *)(ACPIMMIO_SMI_BASE + reg), value);
}
void smi_write32(uint8_t offset, uint32_t value)
void smi_write32(uint8_t reg, uint32_t value)
{
write32((void *)(ACPIMMIO_SMI_BASE + offset), value);
write32((void *)(ACPIMMIO_SMI_BASE + reg), value);
}
/* pm read/write - access registers at 0xfed80300 */
@ -135,45 +135,45 @@ void pm_write32(u8 reg, u32 value)
/* biosram read/write - access registers at 0xfed80500 */
uint8_t biosram_read8(uint8_t offset)
uint8_t biosram_read8(uint8_t reg)
{
return read8((void *)(ACPIMMIO_BIOSRAM_BASE + offset));
return read8((void *)(ACPIMMIO_BIOSRAM_BASE + reg));
}
uint16_t biosram_read16(uint8_t offset) /* Must be 1 byte at a time */
uint16_t biosram_read16(uint8_t reg) /* Must be 1 byte at a time */
{
int i;
uint16_t value = 0;
for (i = sizeof(value) - 1 ; i >= 0 ; i--)
value = (value << 8) | biosram_read8(offset + i);
value = (value << 8) | biosram_read8(reg + i);
return value;
}
uint32_t biosram_read32(uint8_t offset)
uint32_t biosram_read32(uint8_t reg)
{
uint32_t value = biosram_read16(offset + sizeof(uint16_t)) << 16;
return value | biosram_read16(offset);
uint32_t value = biosram_read16(reg + sizeof(uint16_t)) << 16;
return value | biosram_read16(reg);
}
void biosram_write8(uint8_t offset, uint8_t value)
void biosram_write8(uint8_t reg, uint8_t value)
{
write8((void *)(ACPIMMIO_BIOSRAM_BASE + offset), value);
write8((void *)(ACPIMMIO_BIOSRAM_BASE + reg), value);
}
void biosram_write16(uint8_t offset, uint16_t value)
void biosram_write16(uint8_t reg, uint16_t value)
{
int i;
for (i = 0 ; i < sizeof(value) ; i++) {
biosram_write8(offset + i, value & 0xff);
biosram_write8(reg + i, value & 0xff);
value >>= 8;
}
}
void biosram_write32(uint8_t offset, uint32_t value)
void biosram_write32(uint8_t reg, uint32_t value)
{
int i;
for (i = 0 ; i < sizeof(value) ; i++) {
biosram_write8(offset + i, value & 0xff);
biosram_write8(reg + i, value & 0xff);
value >>= 8;
}
}

24
src/soc/amd/common/block/include/amdblocks/acpimmio.h
View File

@ -25,12 +25,12 @@ uint32_t pm_io_read32(uint8_t reg);
void pm_io_write8(uint8_t reg, uint8_t value);
void pm_io_write16(uint8_t reg, uint16_t value);
void pm_io_write32(uint8_t reg, uint32_t value);
uint8_t smi_read8(uint8_t offset);
uint16_t smi_read16(uint8_t offset);
uint32_t smi_read32(uint8_t offset);
void smi_write8(uint8_t offset, uint8_t value);
void smi_write16(uint8_t offset, uint16_t value);
void smi_write32(uint8_t offset, uint32_t value);
uint8_t smi_read8(uint8_t reg);
uint16_t smi_read16(uint8_t reg);
uint32_t smi_read32(uint8_t reg);
void smi_write8(uint8_t reg, uint8_t value);
void smi_write16(uint8_t reg, uint16_t value);
void smi_write32(uint8_t reg, uint32_t value);
uint8_t pm_read8(uint8_t reg);
uint16_t pm_read16(uint8_t reg);
uint32_t pm_read32(uint8_t reg);
@ -43,12 +43,12 @@ uint32_t pm2_read32(uint8_t reg);
void pm2_write8(uint8_t reg, uint8_t value);
void pm2_write16(uint8_t reg, uint16_t value);
void pm2_write32(uint8_t reg, uint32_t value);
uint8_t biosram_read8(uint8_t offset);
uint16_t biosram_read16(uint8_t offset);
uint32_t biosram_read32(uint8_t offset);
void biosram_write8(uint8_t offset, uint8_t value);
void biosram_write16(uint8_t offset, uint16_t value);
void biosram_write32(uint8_t offset, uint32_t value);
uint8_t biosram_read8(uint8_t reg);
uint16_t biosram_read16(uint8_t reg);
uint32_t biosram_read32(uint8_t reg);
void biosram_write8(uint8_t reg, uint8_t value);
void biosram_write16(uint8_t reg, uint16_t value);
void biosram_write32(uint8_t reg, uint32_t value);
uint8_t acpi_read8(uint8_t reg);
uint16_t acpi_read16(uint8_t reg);
uint32_t acpi_read32(uint8_t reg);