soc/amd/common: Fix consistency in AcpiMmio arguments
Change all arguments named "offset" to "reg" to match the others. These should have gone into change 69486cac7: Create AcpiMmio functionality from stoneyridge Change-Id: Ifdd00d0a5d1e03bfa68a13eeece2d2cfd56aa39d Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32930 Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -69,34 +69,34 @@ void pm_io_write32(uint8_t reg, uint32_t value)
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/* smi read/write - access registers at 0xfed80200 */
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/* smi read/write - access registers at 0xfed80200 */
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uint8_t smi_read8(uint8_t offset)
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uint8_t smi_read8(uint8_t reg)
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{
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{
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return read8((void *)(ACPIMMIO_SMI_BASE + offset));
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return read8((void *)(ACPIMMIO_SMI_BASE + reg));
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}
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}
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uint16_t smi_read16(uint8_t offset)
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uint16_t smi_read16(uint8_t reg)
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{
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{
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return read16((void *)(ACPIMMIO_SMI_BASE + offset));
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return read16((void *)(ACPIMMIO_SMI_BASE + reg));
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}
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}
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uint32_t smi_read32(uint8_t offset)
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uint32_t smi_read32(uint8_t reg)
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{
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{
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return read32((void *)(ACPIMMIO_SMI_BASE + offset));
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return read32((void *)(ACPIMMIO_SMI_BASE + reg));
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}
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}
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void smi_write8(uint8_t offset, uint8_t value)
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void smi_write8(uint8_t reg, uint8_t value)
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{
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{
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write8((void *)(ACPIMMIO_SMI_BASE + offset), value);
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write8((void *)(ACPIMMIO_SMI_BASE + reg), value);
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}
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}
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void smi_write16(uint8_t offset, uint16_t value)
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void smi_write16(uint8_t reg, uint16_t value)
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{
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{
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write16((void *)(ACPIMMIO_SMI_BASE + offset), value);
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write16((void *)(ACPIMMIO_SMI_BASE + reg), value);
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}
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}
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void smi_write32(uint8_t offset, uint32_t value)
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void smi_write32(uint8_t reg, uint32_t value)
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{
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{
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write32((void *)(ACPIMMIO_SMI_BASE + offset), value);
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write32((void *)(ACPIMMIO_SMI_BASE + reg), value);
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}
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}
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/* pm read/write - access registers at 0xfed80300 */
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/* pm read/write - access registers at 0xfed80300 */
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@ -135,45 +135,45 @@ void pm_write32(u8 reg, u32 value)
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/* biosram read/write - access registers at 0xfed80500 */
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/* biosram read/write - access registers at 0xfed80500 */
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uint8_t biosram_read8(uint8_t offset)
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uint8_t biosram_read8(uint8_t reg)
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{
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{
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return read8((void *)(ACPIMMIO_BIOSRAM_BASE + offset));
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return read8((void *)(ACPIMMIO_BIOSRAM_BASE + reg));
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}
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}
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uint16_t biosram_read16(uint8_t offset) /* Must be 1 byte at a time */
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uint16_t biosram_read16(uint8_t reg) /* Must be 1 byte at a time */
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{
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{
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int i;
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int i;
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uint16_t value = 0;
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uint16_t value = 0;
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for (i = sizeof(value) - 1 ; i >= 0 ; i--)
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for (i = sizeof(value) - 1 ; i >= 0 ; i--)
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value = (value << 8) | biosram_read8(offset + i);
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value = (value << 8) | biosram_read8(reg + i);
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return value;
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return value;
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}
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}
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uint32_t biosram_read32(uint8_t offset)
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uint32_t biosram_read32(uint8_t reg)
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{
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{
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uint32_t value = biosram_read16(offset + sizeof(uint16_t)) << 16;
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uint32_t value = biosram_read16(reg + sizeof(uint16_t)) << 16;
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return value | biosram_read16(offset);
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return value | biosram_read16(reg);
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}
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}
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void biosram_write8(uint8_t offset, uint8_t value)
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void biosram_write8(uint8_t reg, uint8_t value)
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{
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{
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write8((void *)(ACPIMMIO_BIOSRAM_BASE + offset), value);
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write8((void *)(ACPIMMIO_BIOSRAM_BASE + reg), value);
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}
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}
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void biosram_write16(uint8_t offset, uint16_t value)
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void biosram_write16(uint8_t reg, uint16_t value)
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{
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{
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int i;
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int i;
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for (i = 0 ; i < sizeof(value) ; i++) {
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for (i = 0 ; i < sizeof(value) ; i++) {
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biosram_write8(offset + i, value & 0xff);
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biosram_write8(reg + i, value & 0xff);
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value >>= 8;
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value >>= 8;
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}
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}
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}
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}
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void biosram_write32(uint8_t offset, uint32_t value)
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void biosram_write32(uint8_t reg, uint32_t value)
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{
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{
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int i;
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int i;
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for (i = 0 ; i < sizeof(value) ; i++) {
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for (i = 0 ; i < sizeof(value) ; i++) {
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biosram_write8(offset + i, value & 0xff);
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biosram_write8(reg + i, value & 0xff);
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value >>= 8;
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value >>= 8;
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}
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}
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}
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}
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@ -25,12 +25,12 @@ uint32_t pm_io_read32(uint8_t reg);
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void pm_io_write8(uint8_t reg, uint8_t value);
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void pm_io_write8(uint8_t reg, uint8_t value);
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void pm_io_write16(uint8_t reg, uint16_t value);
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void pm_io_write16(uint8_t reg, uint16_t value);
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void pm_io_write32(uint8_t reg, uint32_t value);
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void pm_io_write32(uint8_t reg, uint32_t value);
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uint8_t smi_read8(uint8_t offset);
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uint8_t smi_read8(uint8_t reg);
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uint16_t smi_read16(uint8_t offset);
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uint16_t smi_read16(uint8_t reg);
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uint32_t smi_read32(uint8_t offset);
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uint32_t smi_read32(uint8_t reg);
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void smi_write8(uint8_t offset, uint8_t value);
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void smi_write8(uint8_t reg, uint8_t value);
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void smi_write16(uint8_t offset, uint16_t value);
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void smi_write16(uint8_t reg, uint16_t value);
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void smi_write32(uint8_t offset, uint32_t value);
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void smi_write32(uint8_t reg, uint32_t value);
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uint8_t pm_read8(uint8_t reg);
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uint8_t pm_read8(uint8_t reg);
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uint16_t pm_read16(uint8_t reg);
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uint16_t pm_read16(uint8_t reg);
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uint32_t pm_read32(uint8_t reg);
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uint32_t pm_read32(uint8_t reg);
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@ -43,12 +43,12 @@ uint32_t pm2_read32(uint8_t reg);
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void pm2_write8(uint8_t reg, uint8_t value);
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void pm2_write8(uint8_t reg, uint8_t value);
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void pm2_write16(uint8_t reg, uint16_t value);
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void pm2_write16(uint8_t reg, uint16_t value);
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void pm2_write32(uint8_t reg, uint32_t value);
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void pm2_write32(uint8_t reg, uint32_t value);
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uint8_t biosram_read8(uint8_t offset);
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uint8_t biosram_read8(uint8_t reg);
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uint16_t biosram_read16(uint8_t offset);
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uint16_t biosram_read16(uint8_t reg);
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uint32_t biosram_read32(uint8_t offset);
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uint32_t biosram_read32(uint8_t reg);
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void biosram_write8(uint8_t offset, uint8_t value);
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void biosram_write8(uint8_t reg, uint8_t value);
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void biosram_write16(uint8_t offset, uint16_t value);
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void biosram_write16(uint8_t reg, uint16_t value);
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void biosram_write32(uint8_t offset, uint32_t value);
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void biosram_write32(uint8_t reg, uint32_t value);
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uint8_t acpi_read8(uint8_t reg);
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uint8_t acpi_read8(uint8_t reg);
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uint16_t acpi_read16(uint8_t reg);
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uint16_t acpi_read16(uint8_t reg);
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uint32_t acpi_read32(uint8_t reg);
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uint32_t acpi_read32(uint8_t reg);
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