mb/google/poppy/variants/nautilus: Enable Dialog DA7219 support
Enable Dialog DA7219 codec i2c device and add required SSDT parameters BUG=b:68686020 TEST=With req'd driver support in kernel v4.4 verify audio on headset Change-Id: Ic815c929f29bec0d26a2981e9933b752c2d84c70 Signed-off-by: Naveen Manohar <naveen.m@intel.com> Signed-off-by: Shruthi Sudhakar <shruthi.sudhakar@intel.com> Reviewed-on: https://review.coreboot.org/22264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_POPPY
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def_bool n
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select BOARD_ID_AUTO
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_I2C_DA7219 if BOARD_GOOGLE_NAUTILUS
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_MAX98927 if !BOARD_GOOGLE_NAUTILUS
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@ -204,6 +204,13 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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# Enable I2C5 for audio codec at 400kHz
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register "i2c[5]" = "{
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 104,
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.fall_time_ns = 52,
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}"
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register "speed_shift_enable" = "1"
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# PL2 override 15W for KBL-Y
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register "tdp_pl2_override" = "15"
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@ -241,7 +248,25 @@ chip soc/intel/skylake
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device pci 16.4 off end # Management Engine Interface 3
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device pci 17.0 off end # SATA
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device pci 19.0 on end # UART #2
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device pci 19.1 on end # I2C #5
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device pci 19.1 on
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chip drivers/i2c/da7219
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "500"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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device i2c 1A on end
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end
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end # I2C #5
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device pci 19.2 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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@ -179,7 +179,7 @@ static const struct pad_config gpio_table[] = {
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/* D8 : ISH_I2C1_SCL ==> NC */
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PAD_CFG_NC(GPP_D8),
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/* D9 : ISH_SPI_CS# ==> CHP1_HEADSET_INT_L */
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PAD_CFG_GPI_APIC_INVERT(GPP_D9, NONE, DEEP),
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PAD_CFG_GPI_APIC(GPP_D9, 20K_PU, DEEP),
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/* D10 : ISH_SPI_CLK ==> NC */
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PAD_CFG_NC(GPP_D10),
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/* D11 : ISH_SPI_MISO ==> NC */
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