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usbdebug: Sanity check PCI EHCI location 

If requested EHCI function is not on bus 0, we would
need to open MMIO windows and configuration register
space for the connected upstream PCI bridge for it
to work. We don't plan to do so.

Change-Id: I7c1c60f9d9890dedfedc9d977faf5152ba362692
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki 2019-01-06 16:13:07 +02:00
parent 954ed5500c
commit 5bd926428e
1 changed files with 4 additions and 0 deletions
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4
src/drivers/usb/pci_ehci.c
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@ -34,6 +34,10 @@ int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset)
{
pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX);
/* We only support controllers on bus 0. */
if (PCI_DEV2SEGBUS(dbg_dev) != 0)
return -1;
#ifdef __SIMPLE_DEVICE__
pci_devfn_t dev = dbg_dev;
#else