Drop remainders of the removed Totalimpact board. Fix typos.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -1,5 +1,5 @@
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config BOARD_DELL_S1850
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bool "Dell S1850"
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bool "S1850"
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select ARCH_X86
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select CPU_INTEL_SOCKET_MPGA604
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select NORTHBRIDGE_INTEL_E7520
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@ -8,7 +8,7 @@ config BOARD_DELL_S1850
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select SUPERIO_NSC_PC8374
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select PIRQ_TABLE
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help
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Dell S1850mainboard.
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Dell S1850 mainboard.
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config MAINBOARD_DIR
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string
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@ -1,58 +0,0 @@
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# Config file for the Total Impact briQ
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# This will make a target directory of ./briq
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target briq
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mainboard totalimpact/briq
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## Use stage 1 initialization code
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option CONFIG_USE_INIT=1
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## We don't use compressed image
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option CONFIG_COMPRESS=0
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## Turn off POST codes
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option CONFIG_NO_POST=1
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## Enable serial console
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option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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## Boot linux from IDE
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option CONFIG_IDE_PAYLOAD=1
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option CONFIG_IDE_BOOT_DRIVE=0
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option CONFIG_IDE_SWAB=1
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option CONFIG_IDE_OFFSET=0
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# ROM is 1Mb
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option CONFIG_ROM_SIZE=1024*1024
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# Set stack and heap sizes (stage 2)
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option CONFIG_STACK_SIZE=0x10000
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option CONFIG_HEAP_SIZE=0x10000
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# Sandpoint Demo Board
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romimage "fallback"
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## Base of ROM
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option CONFIG_ROMBASE=0xfff00000
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## Sandpoint reset vector
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option CONFIG_RESET=CONFIG_ROMBASE+0x100
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## Exception vectors (other than reset vector)
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option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
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## Start of coreboot in the boot rom
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## = CONFIG_RESET + exeception vector table size
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option CONFIG_ROMSTART=CONFIG_RESET+0x3100
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## Coreboot C code runs at this location in RAM
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option CONFIG_RAMBASE=0x00100000
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option CONFIG_RAMSTART=0x00100000
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option CONFIG_BRIQ_750FX=1
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#option CONFIG_BRIQ_7400=1
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end
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buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"
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