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soc/amd/phoenix/Kconfig: Update default soft fuse bits 

Set the default soft fuse bits to the recommended values

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I2354aefe90a08eaef95a68926806d11a9118c3de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Fred Reitberger 2023-05-12 12:53:52 -04:00 committed by Lean Sheng Tan
parent 096e04c935
commit 5c1c7b6904
1 changed files with 1 additions and 1 deletions
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src/soc/amd/phoenix/Kconfig
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@ -430,7 +430,7 @@ config SPL_RW_AB_TABLE_FILE
config PSP_SOFTFUSE_BITS config PSP_SOFTFUSE_BITS
string "PSP Soft Fuse bits to enable" string "PSP Soft Fuse bits to enable"
default "34 28 6" default "36 28 6"
help help
Space separated list of Soft Fuse bits to enable. Space separated list of Soft Fuse bits to enable.
Bit 0: Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG) Bit 0: Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG)