diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index e59ccc1fa7..a42f93dce2 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -39,6 +39,12 @@ chip soc/intel/cannonlake
 	# FSP configuration
 	register "InternalGfx" = "1"
 	register "SkipExtGfxScan" = "1"
+	register "SataSalpSupport" = "1"
+	register "SataMode" = "Sata_AHCI"
+	register "SataPortsEnable[1]" = "1"
+	register "SataPortsDevSlp[1]" = "1"
+	register "satapwroptimize" = "1"
+
 
 	device domain 0 on
 		device pci 00.0 on end # Host Bridge
@@ -67,7 +73,7 @@ chip soc/intel/cannonlake
 		device pci 16.3 off end # Management Engine KT Redirection
 		device pci 16.4 off end # Management Engine Interface 3
 		device pci 16.5 off end # Management Engine Interface 4
-		device pci 17.0 off end # SATA
+		device pci 17.0 on  end # SATA
 		device pci 19.0 off end # I2C #4
 		device pci 19.1 off end # I2C #5
 		device pci 19.2 off end # UART #2
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 0ec97f0177..fe7d1d89d8 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -43,6 +43,12 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_GPI(GPP_C20, NONE, DEEP),
 	/* EC_IN_RW_OD */
 	PAD_CFG_GPI(GPP_C22, NONE, DEEP),
+	/* SATAGP1 */
+	PAD_CFG_NF(GPP_E1, NONE, DEEP, NF2),
+	/* M2_SSD_PE_WAKE_ODL */
+	PAD_CFG_GPI(GPP_E4, NONE, DEEP),
+	/* SATA_DEVSLP1 */
+	PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
 	/* PCH_MEM_STRAP0 */
 	PAD_CFG_GPI(GPP_F20, NONE, PLTRST),
 	/* PCH_MEM_STRAP1 */