mainboard/amd/torpedo: Improve code formatting

Change-Id: I18de4740e0d3512ec81e10b32d13d07a35791b57
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16846
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2016-10-01 15:10:11 +02:00 committed by Kyösti Mälkki
parent 738a3b043e
commit 5c22825c19
8 changed files with 868 additions and 871 deletions

View File

@ -29,7 +29,6 @@ extern u32 apicid_sb900;
unsigned long acpi_fill_madt(unsigned long current)
{
/* create all subtables for processors */
current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0);
current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 1);

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@ -104,9 +104,11 @@
// This string MUST be exactly 12 characters long
#define AGESA_VERSION_STRING {'V', '1', '.', '1', '.', '0', '.', '0', ' ', ' ', ' ', ' '}
// The following definitions specify the default values for various parameters in which there are
// no clearly defined defaults to be used in the common file. The values below are based on product
// and BKDG content, please consult the AGESA Memory team for consultation.
/* The following definitions specify the default values for various parameters
* in which there are no clearly defined defaults to be used in the common file.
* The values below are based on product and BKDG content, please consult the
* AGESA Memory team for consultation.
*/
#define DFLT_SCRUB_DRAM_RATE (0)
#define DFLT_SCRUB_L2_RATE (0)
#define DFLT_SCRUB_L3_RATE (0)

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@ -40,11 +40,7 @@
#define SB_GPIO_REG27 27
#endif
void
gpioEarlyInit(
void
)
{
void gpioEarlyInit(void) {
u8 Flags;
u8 Data8 = 0;
u8 StripInfo = 0;