soc/intel/skylake: remove unused SMI functions
The southbridge_trigger_smi() and southbridge_clear_smi_status() functions are unused. Remove them. Change-Id: I86994191a63cbf515bc330433ef7c3f79a39936e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -61,10 +61,6 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
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void smm_initialize(void);
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void smm_relocate(void);
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/* These helpers are for performing SMM relocation. */
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void southbridge_trigger_smi(void);
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void southbridge_clear_smi_status(void);
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/*
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* The initialization of the southbridge is split into 2 compoments. One is
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* for clearing the state in the SMM registers. The other is for enabling
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@ -80,8 +76,6 @@ static inline void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
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static inline void smm_initialize(void) {}
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static inline void smm_relocate(void) {}
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static inline void southbridge_trigger_smi(void) {}
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static inline void southbridge_clear_smi_status(void) {}
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static inline void southbridge_smm_clear_state(void) {}
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static inline void southbridge_smm_enable_smi(void) {}
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#endif /* CONFIG_HAVE_SMI_HANDLER */
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@ -70,38 +70,6 @@ void southbridge_smm_enable_smi(void)
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enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS);
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}
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void southbridge_trigger_smi(void)
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{
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/*
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* There are several methods of raising a controlled SMI# via
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* software, among them:
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* - Writes to io 0xb2 (APMC)
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* - Writes to the Local Apic ICR with Delivery mode SMI.
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*
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* Using the local apic is a bit more tricky. According to
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* AMD Family 11 Processor BKDG no destination shorthand must be
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* used.
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* The whole SMM initialization is quite a bit hardware specific, so
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* I'm not too worried about the better of the methods at the moment
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*/
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/* raise an SMI interrupt */
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printk(BIOS_SPEW, " ... raise SMI#\n");
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outb(0x00, 0xb2);
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}
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void southbridge_clear_smi_status(void)
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{
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/* Clear SMI status */
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clear_smi_status();
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/* Clear PM1 status */
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clear_pm1_status();
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/* Set EOS bit so other SMIs can occur. */
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enable_smi(EOS);
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}
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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/*
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