util/qualcomm: Add T32 debug scripts
T32 scripts that allow debug of any coreboot stage on sdm845 Change-Id: Ia1bcbe687ca7bba10dc04cb6689640b13a8453f5 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25542 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
T Michael Turney
Patrick Georgi
parent
d1a3366d56
commit
5c49d18537
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;============================================================================
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;##
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;## This file is part of the coreboot project.
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;##
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;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
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;##
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;## This program is free software; you can redistribute it and/or modify
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;## it under the terms of the GNU General Public License version 2 and
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;## only version 2 as published by the Free Software Foundation.
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;##
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;## This program is distributed in the hope that it will be useful,
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;## but WITHOUT ANY WARRANTY; without even the implied warranty of
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;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;## GNU General Public License for more details.
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;##
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;============================================================================
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; Name:
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; debug_cb_845.cmm
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;
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; Description:
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; Debug coreboot 845 front-end
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;============================================================================
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;============================================================================
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; CMM script variables
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;============================================================================
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LOCAL &TargetPkg
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GLOBAL &BBEntryAddr // Bootblock Entry
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GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
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GLOBAL &VEREntryAddr // Verstage Entry
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GLOBAL &ROMEntryAddr // Romstage Entry
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GLOBAL &QCLEntryAddr // QCLstage Entry
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GLOBAL &RAMEntryAddr // Ramstage Entry
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GLOBAL &BL31EntryAddr // BL31 Entry
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GLOBAL &DCEntryAddr // Depthcharge Entry
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GLOBAL &KernelEntryAddr // Kernel Entry
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GLOBAL &PreRamConsoleAddr
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GLOBAL &RamConsoleAddr
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GLOBAL &PreRamCbfsCache
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GLOBAL &VBoot2Work
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GLOBAL &Stack
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GLOBAL &Ttb
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GLOBAL &Timestamp
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GLOBAL &CbmemTop
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GLOBAL &PostRamCbfsCache
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GLOBAL &CBTablePtr
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;============================================================================
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;---------------------------------------------------
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; Entry point
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;---------------------------------------------------
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ENTRY &ImageName
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// Later these can be parameterized
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&TargetPkg="Sdm845Pkg"
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// These settings come from .../src/soc/qualcomm/sdm845/include/soc/memlayout.ld
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&BBEntryAddr=0x14816000
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&VEREntryAddr=0x14680000
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&ROMEntryAddr=0x14680000
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&QCLEntryAddr=0x1485AC00
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&RAMEntryAddr=0x9F860000
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&BL31EntryAddr=0x06820000
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&DCEntryAddr=0xB0104800
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&KernelEntryAddr=0x90080000
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&PreRamConsoleAddr=0x14836400
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&VBoot2Work=0x1482E000
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&Stack=0x14832000
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&Ttb=0x1481E000
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&Timestamp=0x14836000
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&PreRamCbfsCache=0x1483E400
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&CbmemTop=0x280000000
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&PostRamCbfsCache=0x9F800000
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// End of memlayout.ld settings
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// Common commands irrespective of &Mode
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PATH
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&CwDir=os.pwd()
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PATH + &CwDir
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// position at top of coreboot tree
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// find depth count for source loading
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cd ..\..\..\..
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&srcpath=os.pwd()
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b.sel PROGRAM onchip
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sys.u
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b.d /all
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go &BBEntryAddr
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wait !run()
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;---------------------------------------------------
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; Setup area and log
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;---------------------------------------------------
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area.clear
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area.reset
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area.create CB_Logs 1000. 8192.
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area.select CB_Logs
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winclear
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b.d /all
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if FILE.EXIST("C:\TEMP\WIN.CMM")
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do C:\TEMP\WIN.CMM
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area.view CB_Logs
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PRINT %String "Source Path: &srcpath"
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symbol.sourcepath.setbasedir &srcpath\src
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// Make parsing simple, upper-case parameters
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&ImageName=STRING.UPR("&ImageName")
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PRINT "&ImageName"
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DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
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enddo
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@ -0,0 +1,243 @@
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;============================================================================
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;##
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;## This file is part of the coreboot project.
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;##
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;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
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;##
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;## This program is free software; you can redistribute it and/or modify
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;## it under the terms of the GNU General Public License version 2 and
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;## only version 2 as published by the Free Software Foundation.
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;##
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;## This program is distributed in the hope that it will be useful,
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;## but WITHOUT ANY WARRANTY; without even the implied warranty of
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;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;## GNU General Public License for more details.
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;##
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;============================================================================
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; Name:
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; debug_cb_common.cmm
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;
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; Description:
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; Debug coreboot Environment
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;============================================================================
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;============================================================================
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; CMM script variables
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;============================================================================
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LOCAL &BBStage // Bootblock Stage stop?
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LOCAL &VERStage // Verify Stage stop?
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LOCAL &ROMStage // Rom Stage stop?
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LOCAL &QCLStage // QCL Stage stop?
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LOCAL &RAMStage // Ram Stage stop?
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LOCAL &BL31Stage // BL31 Stage stop?
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LOCAL &DCStage // Depthcharge Stage stop?
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LOCAL &KernelSyms // Load Kernel Symbols?
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LOCAL &RAMLoad // T32 Load Code?
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;============================================================================
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;---------------------------------------------------
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; Entry point
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;---------------------------------------------------
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ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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// Parse for RAMLoad first
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if (STR.CP("&ImageName","RAM,*"))
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(
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&RAMLoad=TRUE()
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&ImageName=STR.CUT("&ImageName",4)
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)
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else
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&RAMLoad=FALSE()
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// Parse &ImageName the easy way
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if (STR.CP("&ImageName","*ALL*"))
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(
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&BBStage=TRUE()
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&VERStage=TRUE()
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&ROMStage=TRUE()
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&QCLStage=TRUE()
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&RAMStage=TRUE()
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;&BL31Stage=TRUE()
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&DCStage=TRUE()
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&KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
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)
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else
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(
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&BBStage=STRING.CP("&ImageName","*BB*")
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&VERStage=STRING.CP("&ImageName","*VER*")
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&ROMStage=STRING.CP("&ImageName","*ROM*")
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&QCLStage=STRING.CP("&ImageName","*QCL*")
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&RAMStage=STRING.CP("&ImageName","*RAM*")
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&BL31Stage=STRING.CP("&ImageName","*BL31*")
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&DCStage=STRING.CP("&ImageName","*DC*")
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&KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
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)
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PRINT %String "Debug Script: debug_cb_common.cmm"
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PRINT %String "Images to debug: &ImageName"
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PRINT %String "Loading Kernel Symbols: &KernelSyms"
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PRINT %String "RAMLoad Requested: &RAMLoad"
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PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
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PRINT %String "VerStage Entry Addr: &VEREntryAddr"
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PRINT %String "RomStage Entry Addr: &ROMEntryAddr"
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PRINT %String "QCLStage Entry Addr: &QCLEntryAddr"
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PRINT %String "RamStage Entry Addr: &RAMEntryAddr"
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PRINT %String "BL31 Entry Addr: &BL31EntryAddr"
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PRINT %String "DepthCharge Entry Addr: &DCEntryAddr"
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PRINT %String "Kernel Entry Addr: &KernelEntryAddr"
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PRINT %String "PreRamCbfsCache: &PreRamCbfsCache"
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PRINT %String "PreRamConsoleAddr: &PreRamConsoleAddr"
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PRINT %String "VBoot2Work: &VBoot2Work"
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PRINT %String "Stack: &Stack"
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PRINT %String "Ttb: &Ttb"
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PRINT %String "Timestamp &Timestamp"
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PRINT %String "RamConsoleAddr &RamConsoleAddr"
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PRINT %String "CbmemTop &CbmemTop"
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PRINT %String "PostRamCbfsCache &PostRamCbfsCache"
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// HW at BB entry, first stop: bootblock
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////////////////////////////////////////
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if &BBStage
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(
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&imgpath="build\cbfs\fallback\bootblock.elf"
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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else
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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;uncomment b.s if not simulating (CONFIG_SOC_SIMULATE)
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;b.s run_romstage /o
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;d.set &PreRamConsoleAddr++0x8000 0
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d.dump &PreRamConsoleAddr /spotlight
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print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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go &VEREntryAddr
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wait !run()
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if &VERStage
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(
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&imgpath="build\cbfs\fallback\verstage.elf"
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear
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else
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear
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print %String "Now the control is in VERStage, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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go &ROMEntryAddr
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wait !run()
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if &ROMStage
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(
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&imgpath="build\cbfs\fallback\romstage.elf"
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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else
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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print %String "Now the control is in ROMStage, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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; go &QCLEntryAddr
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; wait !run()
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;
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; if &QCLStage
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; (
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; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf"
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; if (&RAMLoad)
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear
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; else
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear
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;
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; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
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; print %String "Press enter to go to next stage"
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; enter
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; )
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go &RAMEntryAddr
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wait !run()
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if &RAMStage
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(
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&imgpath="build\cbfs\fallback\ramstage.elf"
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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else
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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print %String "Now the control is in RAMStage, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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; BL31 disabled for now
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; Next block of code commented out
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; go &BL31EntryAddr
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; wait !run()
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;
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; if &BL31Stage
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; (
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; &imgpath="build\bl31.elf"
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; if (&RAMLoad)
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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; else
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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; y.spath.srd 3rdparty/arm-trusted-firmware
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; print %String "Now the control is in BL31, press enter after debugging to go to next stage"
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; print %String "Press enter to go to next stage"
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; enter
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; )
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; End of commented out code block: bl31
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go &DCEntryAddr
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wait !run()
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if &DCStage
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(
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&imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf"
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symbol.sourcepath.setbasedir &srcpath\payloads
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath
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else
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode
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b.d /all
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b.set main
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b.set halt
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b.set &KernelEntryAddr ; kernel entry point
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y.spath.srd + payloads/external/depthcharge/depthcharge
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y.spath.srd + 3rdparty\vboot_reference
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d.dump &RamConsoleAddr /spotlight
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&CBTablePtr=Register(X0)
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Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400
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print %String "Now the control is in Depthcharge, press enter after debugging to run free"
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;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel"
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print %String "Press enter when done debugging Depthcharge"
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enter
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)
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; go &KernelEntryAddr
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; wait !run()
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;
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; if &KernelSyms
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; (
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; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:"
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; print %String "vmlinux needs to be copied from ChromiumOS build tree"
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; print %String "msm-4.4 needs to be symbolic link to kernel source tree"
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; d.load.elf vmlinux /strippart "msm-4.4" /nocode
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; y.spath.srd msm-4.4
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; print %String "This script now concludes at kernel entry point"
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; )
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enddo
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