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src/mb/asus/p5qc: Fix some mistakes 

There are some small mistakes in these recently-added mainboards:

 - board_info.txt: Lists board socket incorrectly.
 - cmos.default:   Loglevel was decreased some time ago.
 - devicetree.cb:  Spelling mistake.
 - Kconfig:        Mainboard name does not have a hyphen.

Change-Id: I08d9b06e79683acd3994b84647bce401ed6741e2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/29446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2018-11-03 15:24:29 +01:00 committed by Nico Huber
parent 42adb29853
commit 5c568e00a5
5 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/asus/p5qc/Kconfig
View File

@ -42,7 +42,7 @@ config VARIANT_DIR
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "P5QC" if BOARD_ASUS_P5QC default "P5QC" if BOARD_ASUS_P5QC
default "P5Q-PRO" if BOARD_ASUS_P5Q_PRO default "P5Q PRO" if BOARD_ASUS_P5Q_PRO
config DEVICETREE config DEVICETREE
string string

2
src/mainboard/asus/p5qc/board_info.txt
View File

@ -1,6 +1,6 @@
Category: desktop Category: desktop
Board URL: https://www.asus.com/Motherboards/P5QC/ Board URL: https://www.asus.com/Motherboards/P5QC/
ROM package: SOP-8 ROM package: DIP-8
ROM protocol: SPI ROM protocol: SPI
ROM socketed: y ROM socketed: y
Flashrom support: y Flashrom support: y

2
src/mainboard/asus/p5qc/cmos.default
View File

@ -1,5 +1,5 @@
boot_option=Fallback boot_option=Fallback
debug_level=Spew debug_level=Debug
power_on_after_fail=Disable power_on_after_fail=Disable
nmi=Enable nmi=Enable
sata_mode=AHCI sata_mode=AHCI

10
src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb
View File

@ -85,15 +85,15 @@ chip northbridge/intel/x4x # Northbridge
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.106 off end # SPI1 device pnp 2e.106 off end # SPI1
device pnp 2e.107 off end # GIPO6 device pnp 2e.107 off end # GPIO6
device pnp 2e.207 off end # GIPO7 device pnp 2e.207 off end # GPIO7
device pnp 2e.307 on # GIPO8 device pnp 2e.307 on # GPIO8
irq 0xe4 = 0xfb irq 0xe4 = 0xfb
irq 0xe5 = 0x82 irq 0xe5 = 0x82
end end
device pnp 2e.407 off end # GIPO9 device pnp 2e.407 off end # GPIO9
device pnp 2e.8 off end # WDT device pnp 2e.8 off end # WDT
device pnp 2e.108 off end # GPIO 1 device pnp 2e.108 off end # GPIO1
device pnp 2e.9 off end # GPIO2 device pnp 2e.9 off end # GPIO2
device pnp 2e.109 on end # GPIO3 device pnp 2e.109 on end # GPIO3
device pnp 2e.209 on # GPIO4 device pnp 2e.209 on # GPIO4

10
src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb
View File

@ -82,15 +82,15 @@ chip northbridge/intel/x4x # Northbridge
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.106 off end # SPI1 device pnp 2e.106 off end # SPI1
device pnp 2e.107 off end # GIPO6 device pnp 2e.107 off end # GPIO6
device pnp 2e.207 off end # GIPO7 device pnp 2e.207 off end # GPIO7
device pnp 2e.307 on # GIPO8 device pnp 2e.307 on # GPIO8
irq 0xe4 = 0xfb irq 0xe4 = 0xfb
irq 0xe5 = 0x02 irq 0xe5 = 0x02
end end
device pnp 2e.407 off end # GIPO9 device pnp 2e.407 off end # GPIO9
device pnp 2e.8 off end # WDT device pnp 2e.8 off end # WDT
device pnp 2e.108 off end # GPIO 1 device pnp 2e.108 off end # GPIO1
device pnp 2e.9 off end # GPIO2 device pnp 2e.9 off end # GPIO2
device pnp 2e.109 on end # GPIO3 device pnp 2e.109 on end # GPIO3
device pnp 2e.209 on # GPIO4 device pnp 2e.209 on # GPIO4