Implement native VGA Support.
This code brings a rather complete set of VGA IO routines for whoever wants it. These consist of the by now familiar read/write/mask sets. Due to the crazy nature of VGA, an ancient standard with bits all over the place, it makes no sense to define individual registers. You need a vga register spec at hand if you want to do anything anyway. These IO routines are always exposed. It also provides code to natively set up a 640x400 VGA textmode with an 8x16 font. The native VGA mode code is behind the OPTION_VGA option, as the font really adds to the size of the compiled/compressed rom. The font is the one also present in the linux kernel, but this file is unlicensed. Another copy of this is also present in coreboot in the deprecated console/btext code. The vga console code has been cleaned up, but it still has some TODO's left open, but that's for when i finally have found the remaining issue with the epia-m. Right now, it is important to get parts of my work out already and to make the remainder managable again. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4321 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Luc Verhaegen
parent
195f5cd666
commit
5c5beb765d
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@ -1077,6 +1077,12 @@ define CPU_ADDR_BITS
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comment "CPU hardware address lines num, for AMD K8 could be 40, and AMD family 10 could be 48"
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end
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define CONFIG_VGA
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default 0
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export always
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comment "Include VGA initialisation code"
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end
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define CONFIG_VGA_ROM_RUN
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default 0
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export always
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@ -5,105 +5,95 @@
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*
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*/
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/*
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* TODO:
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* * make vga_console_init take FB location, columns, lines and starting
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* column/line.
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* * track a word offset, and not columns/lines. The offset is needed more
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* often than columns/lines and the latter two can be calculated easily.
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* * then implement real vga scrolling, instead of memcpying stuff around.
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*
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* -- libv.
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*/
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#include <arch/io.h>
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#include <string.h>
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#include <pc80/vga_io.h>
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#include <pc80/vga.h>
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#include <console/console.h>
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/* The video buffer, should be replaced by symbol in ldscript.ld */
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static char *vidmem;
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int vga_line, vga_col;
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int vga_inited = 0; // it will be changed in pci_rom.c
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static int total_lines, total_columns;
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static int current_line, current_column;
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static int vga_console_inited = 0;
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#define VIDBUFFER 0xB8000;
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static void memsetw(void *s, int c, unsigned int n)
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/*
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*
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*/
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void vga_console_init(void)
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{
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int i;
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u16 *ss = (u16 *) s;
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vidmem = (char *) VGA_FB;
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total_columns = VGA_COLUMNS;
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total_lines = VGA_LINES;
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current_column = 0;
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current_line = 0;
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for (i = 0; i < n; i++) {
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ss[i] = ( u16 ) c;
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}
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}
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static void vga_init(void)
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{
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// these are globals
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vga_line = 0;
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vga_col = 0;
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vidmem = (char *) VIDBUFFER;
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// mainboard or chip specific init routines
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// also loads font
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vga_hardware_fixup();
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// set attributes, char for entire screen
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// font should be previously loaded in
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// device specific code (vga_hardware_fixup)
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memsetw(vidmem, VGA_ATTR_CLR_WHT, 2*1024); //
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vga_console_inited = 1;
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}
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static void vga_scroll(void)
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{
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int i;
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memcpy(vidmem, vidmem + COLS * 2, (LINES - 1) * COLS * 2);
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for (i = (LINES - 1) * COLS * 2; i < LINES * COLS * 2; i += 2)
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memcpy(vidmem, vidmem + total_columns * 2, (total_lines - 1) * total_columns * 2);
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for (i = (total_lines - 1) * total_columns * 2; i < total_lines * total_columns * 2; i += 2)
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vidmem[i] = ' ';
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}
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static void vga_tx_byte(unsigned char byte)
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static void
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vga_tx_byte(unsigned char byte)
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{
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if (!vga_inited) {
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return;
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}
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if(!vga_console_inited) {
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vga_init();
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vga_console_inited = 1;
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if (!vga_console_inited)
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return;
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switch (byte) {
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case '\n':
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current_line++;
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current_column = 0;
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break;
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case '\r':
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current_column = 0;
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break;
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case '\b':
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current_column--;
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break;
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case '\t':
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current_column += 4;
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break;
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case '\a': /* beep */
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break;
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default:
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vidmem[((current_column + (current_line * total_columns)) * 2)] = byte;
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vidmem[((current_column + (current_line * total_columns)) * 2) +1] = 0x07;
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current_column++;
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break;
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}
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if (byte == '\n') {
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vga_line++;
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vga_col = 0;
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} else if (byte == '\r') {
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vga_col = 0;
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} else if (byte == '\b') {
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vga_col--;
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} else if (byte == '\t') {
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vga_col += 4;
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} else if (byte == '\a') {
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//beep
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// beep(500);
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;
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} else {
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vidmem[((vga_col + (vga_line *COLS)) * 2)] = byte;
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vidmem[((vga_col + (vga_line *COLS)) * 2) +1] = VGA_ATTR_CLR_WHT;
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vga_col++;
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if (current_column < 0)
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current_column = 0;
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if (current_column >= total_columns) {
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current_line++;
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current_column = 0;
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}
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if (vga_col < 0) {
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vga_col = 0;
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}
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if (vga_col >= COLS) {
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vga_line++;
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vga_col = 0;
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}
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if (vga_line >= LINES) {
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if (current_line >= total_lines) {
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vga_scroll();
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vga_line--;
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current_line--;
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}
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// move the cursor
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write_crtc((vga_col + (vga_line *COLS)) >> 8, CRTC_CURSOR_HI);
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write_crtc((vga_col + (vga_line *COLS)) & 0x0ff, CRTC_CURSOR_LO);
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/* move the cursor */
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vga_cr_write(0x0E, (current_column + (current_line * total_columns)) >> 8);
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vga_cr_write(0x0F, (current_column + (current_line * total_columns)) & 0x0ff);
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}
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static const struct console_driver vga_console __console ={
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@ -673,11 +673,8 @@ void pci_dev_init(struct device *dev)
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run_bios(dev, (unsigned long)ram);
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#if CONFIG_CONSOLE_VGA == 1
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/* vga_inited is a trigger of the VGA console code. */
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if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA) {
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extern int vga_inited;
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vga_inited = 1;
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}
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if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA)
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vga_console_init(void);
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#endif /* CONFIG_CONSOLE_VGA */
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#endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */
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}
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@ -126,4 +126,8 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
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#define print_debug_hex32(HEX) printk_debug ("%08x", (HEX))
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#define print_spew_hex32(HEX) printk_spew ("%08x", (HEX))
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#if CONFIG_CONSOLE_VGA == 1
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void vga_console_init(void);
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#endif
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#endif /* CONSOLE_CONSOLE_H_ */
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@ -1,228 +1,43 @@
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/*
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* Copyright (C) 2007-2009 Luc Verhaegen <libv@skynet.be>
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*
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* modified
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* by Steve M. Gehlbach <steve@kesa.com>
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* Originally from linux/drivers/video/vga16.c by
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* Ben Pfaff <pfaffben@debian.org> and Petr Vandrovec <VANDROVE@vc.cvut.cz>
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* Copyright 1999 Ben Pfaff <pfaffben@debian.org> and Petr Vandrovec <VANDROVE@vc.cvut.cz>
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* Based on VGA info at http://www.goodnet.com/~tinara/FreeVGA/home.htm
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* Based on VESA framebuffer (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
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*
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*/
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#ifndef VGA_H_INCL
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#define VGA_H_INCL 1
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#include <arch/io.h>
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#define u8 unsigned char
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#define u16 unsigned short
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#define u32 unsigned int
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#define __u32 u32
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#define VERROR -1
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#define CHAR_HEIGHT 16
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#define LINES 25
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#define COLS 80
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// macros for writing to vga regs
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#define write_crtc(data,addr) outb(addr,CRT_IC); outb(data,CRT_DC)
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#define write_att(data,addr) inb(IS1_RC); inb(0x80); outb(addr,ATT_IW); inb(0x80); outb(data,ATT_IW); inb(0x80)
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#define write_seq(data,addr) outb(addr,SEQ_I); outb(data,SEQ_D)
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#define write_gra(data,addr) outb(addr,GRA_I); outb(data,GRA_D)
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u8 read_seq_b(u16 addr);
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u8 read_gra_b(u16 addr);
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u8 read_crtc_b(u16 addr);
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u8 read_att_b(u16 addr);
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#ifdef VGA_HARDWARE_FIXUP
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void vga_hardware_fixup(void);
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#else
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#define vga_hardware_fixup() do{} while(0)
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#endif
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#define SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
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#define SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
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#define SYNC_EXT 4 /* external sync */
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#define SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
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#define SYNC_BROADCAST 16 /* broadcast video timings */
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/* vtotal = 144d/288n/576i => PAL */
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/* vtotal = 121d/242n/484i => NTSC */
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#define SYNC_ON_GREEN 32 /* sync on green */
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#define VMODE_NONINTERLACED 0 /* non interlaced */
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#define VMODE_INTERLACED 1 /* interlaced */
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#define VMODE_DOUBLE 2 /* double scan */
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#define VMODE_MASK 255
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#define VMODE_YWRAP 256 /* ywrap instead of panning */
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#define VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
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#define VMODE_CONUPDATE 512 /* don't update x/yoffset */
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/* VGA data register ports */
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#define CRT_DC 0x3D5 /* CRT Controller Data Register - color emulation */
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#define CRT_DM 0x3B5 /* CRT Controller Data Register - mono emulation */
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#define ATT_R 0x3C1 /* Attribute Controller Data Read Register */
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#define GRA_D 0x3CF /* Graphics Controller Data Register */
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#define SEQ_D 0x3C5 /* Sequencer Data Register */
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#define MIS_R 0x3CC // Misc Output Read Register
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#define MIS_W 0x3C2 // Misc Output Write Register
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#define IS1_RC 0x3DA /* Input Status Register 1 - color emulation */
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#define IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */
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#define PEL_D 0x3C9 /* PEL Data Register */
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#define PEL_MSK 0x3C6 /* PEL mask register */
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/* EGA-specific registers */
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#define GRA_E0 0x3CC /* Graphics enable processor 0 */
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#define GRA_E1 0x3CA /* Graphics enable processor 1 */
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/* VGA index register ports */
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#define CRT_IC 0x3D4 /* CRT Controller Index - color emulation */
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#define CRT_IM 0x3B4 /* CRT Controller Index - mono emulation */
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#define ATT_IW 0x3C0 /* Attribute Controller Index & Data Write Register */
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#define GRA_I 0x3CE /* Graphics Controller Index */
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#define SEQ_I 0x3C4 /* Sequencer Index */
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#define PEL_IW 0x3C8 /* PEL Write Index */
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#define PEL_IR 0x3C7 /* PEL Read Index */
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/* standard VGA indexes max counts */
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#define CRTC_C 25 /* 25 CRT Controller Registers sequentially set*/
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// the remainder are not in the par array
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#define ATT_C 21 /* 21 Attribute Controller Registers */
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#define GRA_C 9 /* 9 Graphics Controller Registers */
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#define SEQ_C 5 /* 5 Sequencer Registers */
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#define MIS_C 1 /* 1 Misc Output Register */
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#define CRTC_H_TOTAL 0
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#define CRTC_H_DISP 1
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#define CRTC_H_BLANK_START 2
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#define CRTC_H_BLANK_END 3
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#define CRTC_H_SYNC_START 4
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#define CRTC_H_SYNC_END 5
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#define CRTC_V_TOTAL 6
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#define CRTC_OVERFLOW 7
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#define CRTC_PRESET_ROW 8
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#define CRTC_MAX_SCAN 9
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#define CRTC_CURSOR_START 0x0A
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#define CRTC_CURSOR_END 0x0B
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#define CRTC_START_HI 0x0C
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#define CRTC_START_LO 0x0D
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#define CRTC_CURSOR_HI 0x0E
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#define CRTC_CURSOR_LO 0x0F
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#define CRTC_V_SYNC_START 0x10
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#define CRTC_V_SYNC_END 0x11
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#define CRTC_V_DISP_END 0x12
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#define CRTC_OFFSET 0x13
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#define CRTC_UNDERLINE 0x14
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#define CRTC_V_BLANK_START 0x15
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#define CRTC_V_BLANK_END 0x16
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#define CRTC_MODE 0x17
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#define CRTC_LINE_COMPARE 0x18
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#define ATC_MODE 0x10
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#define ATC_OVERSCAN 0x11
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#define ATC_PLANE_ENABLE 0x12
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#define ATC_PEL 0x13
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#define ATC_COLOR_PAGE 0x14
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#define SEQ_CLOCK_MODE 0x01
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#define SEQ_PLANE_WRITE 0x02
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#define SEQ_CHARACTER_MAP 0x03
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#define SEQ_MEMORY_MODE 0x04
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#define GDC_SR_VALUE 0x00
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#define GDC_SR_ENABLE 0x01
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#define GDC_COMPARE_VALUE 0x02
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#define GDC_DATA_ROTATE 0x03
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#define GDC_PLANE_READ 0x04
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#define GDC_MODE 0x05
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#define GDC_MISC 0x06
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#define GDC_COMPARE_MASK 0x07
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#define GDC_BIT_MASK 0x08
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// text attributes
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#define VGA_ATTR_CLR_RED 0x4
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#define VGA_ATTR_CLR_GRN 0x2
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#define VGA_ATTR_CLR_BLU 0x1
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#define VGA_ATTR_CLR_YEL (VGA_ATTR_CLR_RED | VGA_ATTR_CLR_GRN)
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#define VGA_ATTR_CLR_CYN (VGA_ATTR_CLR_GRN | VGA_ATTR_CLR_BLU)
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#define VGA_ATTR_CLR_MAG (VGA_ATTR_CLR_BLU | VGA_ATTR_CLR_RED)
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#define VGA_ATTR_CLR_BLK 0
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#define VGA_ATTR_CLR_WHT (VGA_ATTR_CLR_RED | VGA_ATTR_CLR_GRN | VGA_ATTR_CLR_BLU)
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#define VGA_ATTR_BNK 0x80
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#define VGA_ATTR_ITN 0x08
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/*
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* vga register parameters
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* these are copied to the
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* registers.
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
|
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*
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* You should have received a copy of the GNU General Public License along with
|
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* this program; if not, write to the Free Software Foundation, Inc., 51
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* Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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struct vga_par {
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u8 crtc[CRTC_C];
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u8 atc[ATT_C];
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u8 gdc[GRA_C];
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u8 seq[SEQ_C];
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u8 misc; // the misc register, MIS_W
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u8 vss;
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};
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#ifndef VGA_H
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#define VGA_H
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/* Interpretation of offset for color fields: All offsets are from the right,
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* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
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* can use the offset as right argument to <<). A pixel afterwards is a bit
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* stream and is written to video memory as that unmodified. This implies
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* big-endian byte order if bits_per_pixel is greater than 8.
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*/
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struct fb_bitfield {
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__u32 offset; /* beginning of bitfield */
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__u32 length; /* length of bitfield */
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__u32 msb_right; /* != 0 : Most significant bit is */
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/* right */
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};
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#define VGA_FB 0xB8000
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#define VGA_FB_SIZE 0x4000 /* char + attr = word sized so 0x8000 / 2 */
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#define VGA_COLUMNS 80
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#define VGA_LINES 25
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struct screeninfo {
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__u32 xres; /* visible resolution */
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__u32 yres;
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__u32 xres_virtual; /* virtual resolution */
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__u32 yres_virtual;
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__u32 xoffset; /* offset from virtual to visible */
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__u32 yoffset; /* resolution */
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#if (CONFIG_VGA == 1)
|
||||
|
||||
__u32 bits_per_pixel; /* guess what */
|
||||
__u32 grayscale; /* != 0 Graylevels instead of colors */
|
||||
void vga_io_init(void);
|
||||
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp; /* transparency */
|
||||
void vga_textmode_init(void);
|
||||
|
||||
__u32 nonstd; /* != 0 Non standard pixel format */
|
||||
void vga_cursor_enable(int enable);
|
||||
void vga_cursor_reset(void);
|
||||
void vga_cursor_set(unsigned int line, unsigned int character);
|
||||
|
||||
__u32 activate; /* see FB_ACTIVATE_* */
|
||||
void vga_frame_set(unsigned int line, unsigned int character);
|
||||
|
||||
__u32 height; /* height of picture in mm */
|
||||
__u32 width; /* width of picture in mm */
|
||||
void vga_line_write(unsigned int line, const char *string);
|
||||
|
||||
__u32 accel_flags; /* acceleration flags (hints) */
|
||||
#endif /* (CONFIG_VGA == 1) */
|
||||
|
||||
/* Timing: All values in pixclocks, except pixclock (of course) */
|
||||
__u32 pixclock; /* pixel clock in ps (pico seconds) */
|
||||
__u32 left_margin; /* time from sync to picture */
|
||||
__u32 right_margin; /* time from picture to sync */
|
||||
__u32 upper_margin; /* time from sync to picture */
|
||||
__u32 lower_margin;
|
||||
__u32 hsync_len; /* length of horizontal sync */
|
||||
__u32 vsync_len; /* length of vertical sync */
|
||||
__u32 sync; /* sync polarity */
|
||||
__u32 vmode; /* interlaced etc */
|
||||
__u32 reserved[6]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif /* VGA_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,66 @@
|
|||
/*
|
||||
* Copyright (C) 2007 Luc Verhaegen <libv@skynet.be>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51
|
||||
* Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef VGA_IO_H
|
||||
#define VGA_IO_H
|
||||
|
||||
/*
|
||||
* All IO necessary to poke VGA registers.
|
||||
*/
|
||||
|
||||
/* VGA Enable */
|
||||
unsigned char vga_enable_read(void);
|
||||
void vga_enable_write(unsigned char value);
|
||||
void vga_enable_mask(unsigned char value, unsigned char mask);
|
||||
|
||||
/* Miscellaneous register */
|
||||
unsigned char vga_misc_read(void);
|
||||
void vga_misc_write(unsigned char value);
|
||||
void vga_misc_mask(unsigned char value, unsigned char mask);
|
||||
|
||||
/* Sequencer registers. */
|
||||
unsigned char vga_sr_read(unsigned char index);
|
||||
void vga_sr_write(unsigned char index, unsigned char value);
|
||||
void vga_sr_mask(unsigned char index, unsigned char value, unsigned char mask);
|
||||
|
||||
/* CR registers. */
|
||||
unsigned char vga_cr_read(unsigned char index);
|
||||
void vga_cr_write(unsigned char index, unsigned char value);
|
||||
void vga_cr_mask(unsigned char index, unsigned char value, unsigned char mask);
|
||||
|
||||
/* Attribute registers. */
|
||||
unsigned char vga_ar_read(unsigned char index);
|
||||
void vga_ar_write(unsigned char index, unsigned char value);
|
||||
void vga_ar_mask(unsigned char index, unsigned char value, unsigned char mask);
|
||||
|
||||
/* Graphics registers. */
|
||||
unsigned char vga_gr_read(unsigned char index);
|
||||
void vga_gr_write(unsigned char index, unsigned char value);
|
||||
void vga_gr_mask(unsigned char index, unsigned char value, unsigned char mask);
|
||||
|
||||
/* DAC functions. */
|
||||
void vga_palette_enable(void);
|
||||
void vga_palette_disable(void);
|
||||
unsigned char vga_dac_mask_read(void);
|
||||
void vga_dac_mask_write(unsigned char mask);
|
||||
void vga_dac_read_address(unsigned char address);
|
||||
void vga_dac_write_address(unsigned char address);
|
||||
unsigned char vga_dac_data_read(void);
|
||||
void vga_dac_data_write(unsigned char data);
|
||||
|
||||
#endif /* VGA_IO_H */
|
||||
|
|
@ -1,5 +1,4 @@
|
|||
uses CONFIG_IDE
|
||||
uses CONFIG_CONSOLE_VGA
|
||||
uses CONFIG_UDELAY_IO
|
||||
|
||||
object mc146818rtc.o
|
||||
|
|
@ -15,4 +14,6 @@ if CONFIG_IDE
|
|||
dir ide
|
||||
end
|
||||
|
||||
dir vga
|
||||
|
||||
object keyboard.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,9 @@
|
|||
uses CONFIG_VGA
|
||||
|
||||
# always build this.
|
||||
object vga_io.o
|
||||
|
||||
# this adds a vga modeset including a huge font.
|
||||
if CONFIG_VGA
|
||||
object vga.o
|
||||
end
|
||||
|
|
@ -0,0 +1,328 @@
|
|||
/*
|
||||
* Copyright (C) 2007-2009 Luc Verhaegen <libv@skynet.be>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51
|
||||
* Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <pc80/vga.h>
|
||||
#include <pc80/vga_io.h>
|
||||
|
||||
#include <string.h>
|
||||
|
||||
/*
|
||||
* pci io enable should've happened before
|
||||
*/
|
||||
void
|
||||
vga_io_init(void)
|
||||
{
|
||||
vga_enable_mask(0x01, 0x01);
|
||||
|
||||
/* cr io is at 0x3D4/0x3D5 */
|
||||
vga_misc_mask(0x01, 0x01);
|
||||
|
||||
/* clear cr0-7 protection */
|
||||
vga_cr_mask(0x11, 0x00, 0x80);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
static void
|
||||
vga_fb_init(void)
|
||||
{
|
||||
vga_sr_write(0x02, 0x03);
|
||||
vga_sr_write(0x03, 0x00);
|
||||
vga_sr_write(0x04, 0x02); /* access all 256kB */
|
||||
|
||||
vga_gr_write(0x00, 0x00);
|
||||
vga_gr_write(0x01, 0x00);
|
||||
vga_gr_write(0x02, 0x00);
|
||||
vga_gr_write(0x03, 0x00);
|
||||
vga_gr_write(0x04, 0x00);
|
||||
vga_gr_write(0x05, 0x10);
|
||||
vga_gr_write(0x06, 0x0E); /* map at 0xB8000 */
|
||||
vga_gr_write(0x07, 0x00);
|
||||
vga_gr_write(0x08, 0xFF);
|
||||
|
||||
/* o/e enable: ram enable */
|
||||
vga_misc_mask(0x22, 0x22);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
static void
|
||||
vga_fb_clear(void)
|
||||
{
|
||||
memset((void *)VGA_FB, 0x00, 0x8000);
|
||||
}
|
||||
|
||||
#include "vga_palette.c"
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
static void
|
||||
vga_palette_init(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
/* set up attribute registers */
|
||||
for (i = 0; i < 0x10; i++)
|
||||
vga_ar_write(i, i);
|
||||
|
||||
vga_ar_write(0x10, 0x0c);
|
||||
vga_ar_write(0x11, 0x00);
|
||||
vga_ar_write(0x12, 0x0F);
|
||||
vga_ar_write(0x13, 0x08);
|
||||
vga_ar_write(0x14, 0x00);
|
||||
|
||||
vga_palette_disable();
|
||||
|
||||
/* load actual palette */
|
||||
vga_dac_mask_write(0xFF);
|
||||
|
||||
for (i = 0; i < 0x100; i++) {
|
||||
vga_dac_write_address(i);
|
||||
vga_dac_data_write(default_vga_palette[i].red);
|
||||
vga_dac_data_write(default_vga_palette[i].green);
|
||||
vga_dac_data_write(default_vga_palette[i].blue);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
static void
|
||||
vga_mode_set(int hdisplay, int hblankstart, int hsyncstart, int hsyncend,
|
||||
int hblankend, int htotal, int vdisplay, int vblankstart,
|
||||
int vsyncstart, int vsyncend, int vblankend, int vtotal,
|
||||
int stride)
|
||||
{
|
||||
/* htotal: 2080 */
|
||||
htotal /= 8;
|
||||
htotal -= 5;
|
||||
vga_cr_write(0x00, htotal);
|
||||
|
||||
/* hdisplay: 2048 */
|
||||
hdisplay /= 8;
|
||||
hdisplay -= 1;
|
||||
vga_cr_write(0x01, hdisplay);
|
||||
|
||||
/* hblankstart: 2048 */
|
||||
hblankstart /= 8;
|
||||
hblankstart -= 1;
|
||||
vga_cr_write(0x02, hblankstart);
|
||||
|
||||
/* hblankend: hblankstart + 512 */
|
||||
hblankend /= 8;
|
||||
hblankend -= 1;
|
||||
vga_cr_mask(0x03, hblankend, 0x1F);
|
||||
vga_cr_mask(0x05, hblankend << 2, 0x80);
|
||||
|
||||
/* hsyncstart: 255 * 8: 2040 */
|
||||
vga_cr_write(0x04, hsyncstart / 8);
|
||||
|
||||
/* hsyncend: hsyncstart + 255 */
|
||||
vga_cr_mask(0x05, hsyncend / 8, 0x1F);
|
||||
|
||||
/* vtotal: 1025 */
|
||||
vtotal -= 2;
|
||||
vga_cr_write(0x06, vtotal);
|
||||
vga_cr_mask(0x07, vtotal >> 8, 0x01);
|
||||
vga_cr_mask(0x07, vtotal >> 4, 0x20);
|
||||
|
||||
/* vdisplay: 1024 */
|
||||
vdisplay -= 1;
|
||||
vga_cr_write(0x12, vdisplay);
|
||||
vga_cr_mask(0x07, vdisplay >> 7, 0x02);
|
||||
vga_cr_mask(0x07, vdisplay >> 3, 0x40);
|
||||
|
||||
/* vblankstart: 1024 */
|
||||
vblankstart -= 1;
|
||||
vga_cr_write(0x15, vblankstart);
|
||||
vga_cr_mask(0x07, vblankstart >> 5, 0x08);
|
||||
vga_cr_mask(0x09, vblankstart >> 4, 0x20);
|
||||
|
||||
/* vblankend: vblankstart + 256 */
|
||||
vblankend -= 1;
|
||||
vga_cr_write(0x16, vblankend);
|
||||
|
||||
/* vsyncstart: 1023 */
|
||||
vga_cr_write(0x10, vsyncstart);
|
||||
vga_cr_mask(0x07, vsyncstart >> 6, 0x04);
|
||||
vga_cr_mask(0x07, vsyncstart >> 2, 0x80);
|
||||
|
||||
/* vsyncend: vsyncstart + 16 */
|
||||
vga_cr_mask(0x11, vsyncend, 0x0F);
|
||||
|
||||
/* stride */
|
||||
vga_cr_write(0x13, stride / 8);
|
||||
|
||||
/* line compare */
|
||||
vga_cr_write(0x18, 0xFF);
|
||||
vga_cr_mask(0x07, 0x10, 0x10);
|
||||
vga_cr_mask(0x09, 0x40, 0x40);
|
||||
|
||||
vga_misc_mask(0x44, 0xCC); /* set up clock: 27mhz and h/vsync */
|
||||
|
||||
vga_cr_mask(0x09, 0x00, 0x80); /* disable doublescan */
|
||||
}
|
||||
|
||||
#include "vga_font_8x16.c"
|
||||
|
||||
static void
|
||||
vga_font_8x16_load(void)
|
||||
{
|
||||
unsigned char *p;
|
||||
int i, j;
|
||||
unsigned char sr2, sr4, gr5, gr6;
|
||||
|
||||
#define height 16
|
||||
#define count 256
|
||||
|
||||
sr2 = vga_sr_read(0x02);
|
||||
sr4 = vga_sr_read(0x04);
|
||||
gr5 = vga_gr_read(0x05);
|
||||
gr6 = vga_gr_read(0x06);
|
||||
|
||||
/* disable odd/even */
|
||||
vga_sr_mask(0x04, 0x04, 0x04);
|
||||
vga_gr_mask(0x05, 0x00, 0x10);
|
||||
vga_gr_mask(0x06, 0x00, 0x02);
|
||||
|
||||
/* plane 2 */
|
||||
vga_sr_write(0x02, 0x04);
|
||||
p = (unsigned char *) VGA_FB;
|
||||
for (i = 0; i < count; i++) {
|
||||
for (j = 0; j < 32; j++) {
|
||||
if (j < height)
|
||||
*p = vga_font_8x16[i][j];
|
||||
else
|
||||
*p = 0x00;
|
||||
p++;
|
||||
}
|
||||
}
|
||||
|
||||
vga_gr_write(0x06, gr6);
|
||||
vga_gr_write(0x05, gr5);
|
||||
vga_sr_write(0x04, sr4);
|
||||
vga_sr_write(0x02, sr2);
|
||||
|
||||
/* set up font size */
|
||||
vga_cr_mask(0x09, 16 - 1, 0x1F);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
void
|
||||
vga_cursor_enable(int enable)
|
||||
{
|
||||
if (enable)
|
||||
vga_cr_mask(0x0A, 0x00, 0x20);
|
||||
else
|
||||
vga_cr_mask(0x0A, 0x20, 0x20);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
void
|
||||
vga_cursor_reset(void)
|
||||
{
|
||||
vga_cr_write(0x0A, 0x2E);
|
||||
vga_cr_write(0x0B, 0x0E);
|
||||
vga_cr_write(0x0E, 0x00);
|
||||
vga_cr_write(0x0F, 0x00);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
void
|
||||
vga_cursor_set(unsigned int line, unsigned int character)
|
||||
{
|
||||
unsigned int offset = (80 * line + character) & 0xFFFF;
|
||||
|
||||
vga_cr_write(0x0A, 0x0E);
|
||||
vga_cr_write(0x0B, 0x0E);
|
||||
vga_cr_write(0x0E, offset >> 8);
|
||||
vga_cr_write(0x0F, offset & 0xFF);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
void
|
||||
vga_frame_set(unsigned int line, unsigned int character)
|
||||
{
|
||||
unsigned int offset = (80 * line + character) & 0xFFFF;
|
||||
|
||||
vga_cr_write(0x0C, offset >> 8);
|
||||
vga_cr_write(0x0D, offset & 0xFF);
|
||||
}
|
||||
|
||||
/*
|
||||
* simply fills a line with the given string.
|
||||
*/
|
||||
void
|
||||
vga_line_write(unsigned int line, const char *string)
|
||||
{
|
||||
unsigned short *p = (unsigned short *) VGA_FB + (80 * line);
|
||||
int i, len = strlen(string);
|
||||
|
||||
for (i = 0; i < 80; i++) {
|
||||
if (i < len)
|
||||
p[i] = 0x0F00 | string[i];
|
||||
else
|
||||
p[i] = 0x0F00;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* set up everything to get a basic 80x25 textmode.
|
||||
*/
|
||||
void
|
||||
vga_textmode_init(void)
|
||||
{
|
||||
vga_sr_write(0x00, 0x01); /* clear reset */
|
||||
vga_sr_write(0x01, 0x00);
|
||||
|
||||
/* set up cr */
|
||||
vga_cr_mask(0x03, 0x80, 0xE0);
|
||||
vga_cr_mask(0x05, 0x00, 0x60);
|
||||
|
||||
vga_cr_write(0x08, 0x00);
|
||||
|
||||
vga_cr_write(0x14, 0x00); /* */
|
||||
|
||||
vga_cr_write(0x17, 0x23);
|
||||
|
||||
vga_palette_init();
|
||||
|
||||
vga_mode_set(640, 648, 680, 776, 792, 800,
|
||||
400, 407, 412, 414, 442, 449, 320);
|
||||
|
||||
vga_cursor_reset();
|
||||
vga_frame_set(0, 0);
|
||||
|
||||
vga_fb_init();
|
||||
vga_fb_clear();
|
||||
vga_font_8x16_load();
|
||||
|
||||
vga_sr_mask(0x00, 0x02, 0x02); /* take us out of reset */
|
||||
vga_cr_mask(0x17, 0x80, 0x80); /* sync! */
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,275 @@
|
|||
/*
|
||||
* Copyright (C) 2007-2009 Luc Verhaegen <libv@skynet.be>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc., 51
|
||||
* Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* All IO necessary to poke VGA registers.
|
||||
*/
|
||||
#include <pc80/vga_io.h>
|
||||
|
||||
#include <arch/io.h>
|
||||
|
||||
#define VGA_CR_INDEX 0x3D4
|
||||
#define VGA_CR_VALUE 0x3D5
|
||||
|
||||
#define VGA_SR_INDEX 0x3C4
|
||||
#define VGA_SR_VALUE 0x3C5
|
||||
|
||||
#define VGA_GR_INDEX 0x3CE
|
||||
#define VGA_GR_VALUE 0x3CF
|
||||
|
||||
#define VGA_AR_INDEX 0x3C0
|
||||
#define VGA_AR_VALUE_READ 0x3C1
|
||||
#define VGA_AR_VALUE_WRITE VGA_AR_INDEX
|
||||
|
||||
#define VGA_MISC_WRITE 0x3C2
|
||||
#define VGA_MISC_READ 0x3CC
|
||||
|
||||
#define VGA_ENABLE 0x3C3
|
||||
#define VGA_STAT1 0x3DA
|
||||
|
||||
#define VGA_DAC_MASK 0x3C6
|
||||
#define VGA_DAC_READ_ADDRESS 0x3C7
|
||||
#define VGA_DAC_WRITE_ADDRESS 0x3C8
|
||||
#define VGA_DAC_DATA 0x3C9
|
||||
|
||||
/*
|
||||
* VGA enable. Poke this to have the PCI IO enabled device accept VGA IO.
|
||||
*/
|
||||
unsigned char
|
||||
vga_enable_read(void)
|
||||
{
|
||||
return inb(VGA_ENABLE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_enable_write(unsigned char value)
|
||||
{
|
||||
outb(value, VGA_ENABLE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_enable_mask(unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_enable_read();
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_enable_write(tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Miscellaneous register.
|
||||
*/
|
||||
unsigned char
|
||||
vga_misc_read(void)
|
||||
{
|
||||
return inb(VGA_MISC_READ);
|
||||
}
|
||||
|
||||
void
|
||||
vga_misc_write(unsigned char value)
|
||||
{
|
||||
outb(value, VGA_MISC_WRITE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_misc_mask(unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_misc_read();
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_misc_write(tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Sequencer registers.
|
||||
*/
|
||||
unsigned char
|
||||
vga_sr_read(unsigned char index)
|
||||
{
|
||||
outb(index, VGA_SR_INDEX);
|
||||
return (inb(VGA_SR_VALUE));
|
||||
}
|
||||
|
||||
void
|
||||
vga_sr_write(unsigned char index, unsigned char value)
|
||||
{
|
||||
outb(index, VGA_SR_INDEX);
|
||||
outb(value, VGA_SR_VALUE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_sr_mask(unsigned char index, unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_sr_read(index);
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_sr_write(index, tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* CRTC registers.
|
||||
*/
|
||||
unsigned char
|
||||
vga_cr_read(unsigned char index)
|
||||
{
|
||||
outb(index, VGA_CR_INDEX);
|
||||
return (inb(VGA_CR_VALUE));
|
||||
}
|
||||
|
||||
void
|
||||
vga_cr_write(unsigned char index, unsigned char value)
|
||||
{
|
||||
outb(index, VGA_CR_INDEX);
|
||||
outb(value, VGA_CR_VALUE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_cr_mask(unsigned char index, unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_cr_read(index);
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_cr_write(index, tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Attribute registers.
|
||||
*/
|
||||
unsigned char
|
||||
vga_ar_read(unsigned char index)
|
||||
{
|
||||
unsigned char ret;
|
||||
|
||||
(void) inb(VGA_STAT1);
|
||||
outb(index, VGA_AR_INDEX);
|
||||
ret = inb(VGA_AR_VALUE_READ);
|
||||
(void) inb(VGA_STAT1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void
|
||||
vga_ar_write(unsigned char index, unsigned char value)
|
||||
{
|
||||
(void) inb(VGA_STAT1);
|
||||
outb(index, VGA_AR_INDEX);
|
||||
outb(value, VGA_AR_VALUE_WRITE);
|
||||
(void) inb(VGA_STAT1);
|
||||
}
|
||||
|
||||
void
|
||||
vga_ar_mask(unsigned char index, unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_ar_read(index);
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_ar_write(index, tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Graphics registers.
|
||||
*/
|
||||
unsigned char
|
||||
vga_gr_read(unsigned char index)
|
||||
{
|
||||
outb(index, VGA_GR_INDEX);
|
||||
return (inb(VGA_GR_VALUE));
|
||||
}
|
||||
|
||||
void
|
||||
vga_gr_write(unsigned char index, unsigned char value)
|
||||
{
|
||||
outb(index, VGA_GR_INDEX);
|
||||
outb(value, VGA_GR_VALUE);
|
||||
}
|
||||
|
||||
void
|
||||
vga_gr_mask(unsigned char index, unsigned char value, unsigned char mask)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
tmp = vga_gr_read(index);
|
||||
tmp &= ~mask;
|
||||
tmp |= (value & mask);
|
||||
vga_gr_write(index, tmp);
|
||||
}
|
||||
|
||||
/*
|
||||
* DAC functions.
|
||||
*/
|
||||
void
|
||||
vga_palette_enable(void)
|
||||
{
|
||||
(void) inb(VGA_STAT1);
|
||||
outb(0x00, VGA_AR_INDEX);
|
||||
(void) inb(VGA_STAT1);
|
||||
}
|
||||
|
||||
void
|
||||
vga_palette_disable(void)
|
||||
{
|
||||
(void) inb(VGA_STAT1);
|
||||
outb(0x20, VGA_AR_INDEX);
|
||||
(void) inb(VGA_STAT1);
|
||||
}
|
||||
|
||||
unsigned char
|
||||
vga_dac_mask_read(void)
|
||||
{
|
||||
return inb(VGA_DAC_MASK);
|
||||
}
|
||||
|
||||
void
|
||||
vga_dac_mask_write(unsigned char mask)
|
||||
{
|
||||
outb(mask, VGA_DAC_MASK);
|
||||
}
|
||||
|
||||
void
|
||||
vga_dac_read_address(unsigned char address)
|
||||
{
|
||||
outb(address, VGA_DAC_READ_ADDRESS);
|
||||
}
|
||||
|
||||
void
|
||||
vga_dac_write_address(unsigned char address)
|
||||
{
|
||||
outb(address, VGA_DAC_WRITE_ADDRESS);
|
||||
}
|
||||
|
||||
unsigned char
|
||||
vga_dac_data_read(void)
|
||||
{
|
||||
return inb(VGA_DAC_DATA);
|
||||
}
|
||||
|
||||
void
|
||||
vga_dac_data_write(unsigned char data)
|
||||
{
|
||||
outb(data, VGA_DAC_DATA);
|
||||
}
|
||||
|
|
@ -0,0 +1,261 @@
|
|||
/*
|
||||
* Basic palette.
|
||||
*/
|
||||
struct palette {
|
||||
unsigned char red;
|
||||
unsigned char green;
|
||||
unsigned char blue;
|
||||
};
|
||||
|
||||
static const struct palette
|
||||
default_vga_palette[0x100] = {
|
||||
{ 0x00, 0x00, 0x00},
|
||||
{ 0x00, 0x00, 0x2A},
|
||||
{ 0x00, 0x2A, 0x00},
|
||||
{ 0x00, 0x2A, 0x2A},
|
||||
{ 0x2A, 0x00, 0x00},
|
||||
{ 0x2A, 0x00, 0x2A},
|
||||
{ 0x2A, 0x15, 0x00},
|
||||
{ 0x2A, 0x2A, 0x2A},
|
||||
{ 0x15, 0x15, 0x15},
|
||||
{ 0x15, 0x15, 0x3F},
|
||||
{ 0x15, 0x3F, 0x15},
|
||||
{ 0x15, 0x3F, 0x3F},
|
||||
{ 0x3F, 0x15, 0x15},
|
||||
{ 0x3F, 0x15, 0x3F},
|
||||
{ 0x3F, 0x3F, 0x15},
|
||||
{ 0x3F, 0x3F, 0x3F},
|
||||
{ 0x00, 0x00, 0x00},
|
||||
{ 0x05, 0x05, 0x05},
|
||||
{ 0x08, 0x08, 0x08},
|
||||
{ 0x0B, 0x0B, 0x0B},
|
||||
{ 0x0E, 0x0E, 0x0E},
|
||||
{ 0x11, 0x11, 0x11},
|
||||
{ 0x16, 0x16, 0x16},
|
||||
{ 0x18, 0x18, 0x18},
|
||||
{ 0x1C, 0x1C, 0x1C},
|
||||
{ 0x20, 0x20, 0x20},
|
||||
{ 0x24, 0x24, 0x24},
|
||||
{ 0x28, 0x28, 0x28},
|
||||
{ 0x2D, 0x2D, 0x2D},
|
||||
{ 0x32, 0x32, 0x32},
|
||||
{ 0x38, 0x38, 0x38},
|
||||
{ 0x3F, 0x3F, 0x3F},
|
||||
{ 0x00, 0x00, 0x3F},
|
||||
{ 0x20, 0x00, 0x3F},
|
||||
{ 0x1F, 0x00, 0x3F},
|
||||
{ 0x2F, 0x00, 0x3F},
|
||||
{ 0x3F, 0x00, 0x3F},
|
||||
{ 0x3F, 0x00, 0x2F},
|
||||
{ 0x3F, 0x00, 0x1F},
|
||||
{ 0x3F, 0x00, 0x20},
|
||||
{ 0x3F, 0x00, 0x00},
|
||||
{ 0x3F, 0x20, 0x00},
|
||||
{ 0x3F, 0x1F, 0x00},
|
||||
{ 0x3F, 0x2F, 0x00},
|
||||
{ 0x3F, 0x3F, 0x00},
|
||||
{ 0x2F, 0x3F, 0x00},
|
||||
{ 0x1F, 0x3F, 0x00},
|
||||
{ 0x20, 0x3F, 0x00},
|
||||
{ 0x00, 0x3F, 0x00},
|
||||
{ 0x00, 0x3F, 0x20},
|
||||
{ 0x00, 0x3F, 0x1F},
|
||||
{ 0x00, 0x3F, 0x2F},
|
||||
{ 0x00, 0x3F, 0x3F},
|
||||
{ 0x00, 0x2F, 0x3F},
|
||||
{ 0x00, 0x1F, 0x3F},
|
||||
{ 0x00, 0x20, 0x3F},
|
||||
{ 0x1F, 0x1F, 0x3F},
|
||||
{ 0x27, 0x1F, 0x3F},
|
||||
{ 0x2F, 0x1F, 0x3F},
|
||||
{ 0x37, 0x1F, 0x3F},
|
||||
{ 0x3F, 0x1F, 0x3F},
|
||||
{ 0x3F, 0x1F, 0x37},
|
||||
{ 0x3F, 0x1F, 0x2F},
|
||||
{ 0x3F, 0x1F, 0x27},
|
||||
{ 0x3F, 0x1F, 0x1F},
|
||||
{ 0x3F, 0x27, 0x1F},
|
||||
{ 0x3F, 0x2F, 0x1F},
|
||||
{ 0x3F, 0x37, 0x1F},
|
||||
{ 0x3F, 0x3F, 0x1F},
|
||||
{ 0x37, 0x3F, 0x1F},
|
||||
{ 0x2F, 0x3F, 0x1F},
|
||||
{ 0x27, 0x3F, 0x1F},
|
||||
{ 0x1F, 0x3F, 0x1F},
|
||||
{ 0x1F, 0x3F, 0x27},
|
||||
{ 0x1F, 0x3F, 0x2F},
|
||||
{ 0x1F, 0x3F, 0x37},
|
||||
{ 0x1F, 0x3F, 0x3F},
|
||||
{ 0x1F, 0x37, 0x3F},
|
||||
{ 0x1F, 0x2F, 0x3F},
|
||||
{ 0x1F, 0x27, 0x3F},
|
||||
{ 0x2D, 0x2D, 0x3F},
|
||||
{ 0x31, 0x2D, 0x3F},
|
||||
{ 0x36, 0x2D, 0x3F},
|
||||
{ 0x3A, 0x2D, 0x3F},
|
||||
{ 0x3F, 0x2D, 0x3F},
|
||||
{ 0x3F, 0x2D, 0x3A},
|
||||
{ 0x3F, 0x2D, 0x36},
|
||||
{ 0x3F, 0x2D, 0x31},
|
||||
{ 0x3F, 0x2D, 0x2D},
|
||||
{ 0x3F, 0x31, 0x2D},
|
||||
{ 0x3F, 0x36, 0x2D},
|
||||
{ 0x3F, 0x3A, 0x2D},
|
||||
{ 0x3F, 0x3F, 0x2D},
|
||||
{ 0x3A, 0x3F, 0x2D},
|
||||
{ 0x36, 0x3F, 0x2D},
|
||||
{ 0x31, 0x3F, 0x2D},
|
||||
{ 0x2D, 0x3F, 0x2D},
|
||||
{ 0x2D, 0x3F, 0x31},
|
||||
{ 0x2D, 0x3F, 0x36},
|
||||
{ 0x2D, 0x3F, 0x3A},
|
||||
{ 0x2D, 0x3F, 0x3F},
|
||||
{ 0x2D, 0x3A, 0x3F},
|
||||
{ 0x2D, 0x36, 0x3F},
|
||||
{ 0x2D, 0x31, 0x3F},
|
||||
{ 0x00, 0x00, 0x1C},
|
||||
{ 0x07, 0x00, 0x1C},
|
||||
{ 0x0E, 0x00, 0x1C},
|
||||
{ 0x15, 0x00, 0x1C},
|
||||
{ 0x1C, 0x00, 0x1C},
|
||||
{ 0x1C, 0x00, 0x15},
|
||||
{ 0x1C, 0x00, 0x0E},
|
||||
{ 0x1C, 0x00, 0x07},
|
||||
{ 0x1C, 0x00, 0x00},
|
||||
{ 0x1C, 0x07, 0x00},
|
||||
{ 0x1C, 0x0E, 0x00},
|
||||
{ 0x1C, 0x15, 0x00},
|
||||
{ 0x1C, 0x1C, 0x00},
|
||||
{ 0x15, 0x1C, 0x00},
|
||||
{ 0x0E, 0x1C, 0x00},
|
||||
{ 0x07, 0x1C, 0x00},
|
||||
{ 0x00, 0x1C, 0x00},
|
||||
{ 0x00, 0x1C, 0x07},
|
||||
{ 0x00, 0x1C, 0x0E},
|
||||
{ 0x00, 0x1C, 0x15},
|
||||
{ 0x00, 0x1C, 0x1C},
|
||||
{ 0x00, 0x15, 0x1C},
|
||||
{ 0x00, 0x0E, 0x1C},
|
||||
{ 0x00, 0x07, 0x1C},
|
||||
{ 0x0E, 0x0E, 0x1C},
|
||||
{ 0x11, 0x0E, 0x1C},
|
||||
{ 0x15, 0x0E, 0x1C},
|
||||
{ 0x18, 0x0E, 0x1C},
|
||||
{ 0x1C, 0x0E, 0x1C},
|
||||
{ 0x1C, 0x0E, 0x18},
|
||||
{ 0x1C, 0x0E, 0x15},
|
||||
{ 0x1C, 0x0E, 0x11},
|
||||
{ 0x1C, 0x0E, 0x0E},
|
||||
{ 0x1C, 0x11, 0x0E},
|
||||
{ 0x1C, 0x15, 0x0E},
|
||||
{ 0x1C, 0x18, 0x0E},
|
||||
{ 0x1C, 0x1C, 0x0E},
|
||||
{ 0x18, 0x1C, 0x0E},
|
||||
{ 0x15, 0x1C, 0x0E},
|
||||
{ 0x11, 0x1C, 0x0E},
|
||||
{ 0x0E, 0x1C, 0x0E},
|
||||
{ 0x0E, 0x1C, 0x11},
|
||||
{ 0x0E, 0x1C, 0x15},
|
||||
{ 0x0E, 0x1C, 0x18},
|
||||
{ 0x0E, 0x1C, 0x1C},
|
||||
{ 0x0E, 0x18, 0x1C},
|
||||
{ 0x0E, 0x15, 0x1C},
|
||||
{ 0x0E, 0x11, 0x1C},
|
||||
{ 0x16, 0x16, 0x1C},
|
||||
{ 0x16, 0x16, 0x1C},
|
||||
{ 0x18, 0x16, 0x1C},
|
||||
{ 0x1A, 0x16, 0x1C},
|
||||
{ 0x1C, 0x16, 0x1C},
|
||||
{ 0x1C, 0x16, 0x1A},
|
||||
{ 0x1C, 0x16, 0x18},
|
||||
{ 0x1C, 0x16, 0x16},
|
||||
{ 0x1C, 0x16, 0x16},
|
||||
{ 0x1C, 0x16, 0x16},
|
||||
{ 0x1C, 0x18, 0x16},
|
||||
{ 0x1C, 0x1A, 0x16},
|
||||
{ 0x1C, 0x1C, 0x16},
|
||||
{ 0x1A, 0x1C, 0x16},
|
||||
{ 0x18, 0x1C, 0x16},
|
||||
{ 0x16, 0x1C, 0x16},
|
||||
{ 0x16, 0x1C, 0x16},
|
||||
{ 0x16, 0x1C, 0x16},
|
||||
{ 0x16, 0x1C, 0x18},
|
||||
{ 0x16, 0x1C, 0x1A},
|
||||
{ 0x16, 0x1C, 0x1C},
|
||||
{ 0x16, 0x1A, 0x1C},
|
||||
{ 0x16, 0x18, 0x1C},
|
||||
{ 0x16, 0x16, 0x1C},
|
||||
{ 0x00, 0x00, 0x20},
|
||||
{ 0x04, 0x00, 0x20},
|
||||
{ 0x08, 0x00, 0x20},
|
||||
{ 0x0C, 0x00, 0x20},
|
||||
{ 0x20, 0x00, 0x20},
|
||||
{ 0x20, 0x00, 0x0C},
|
||||
{ 0x20, 0x00, 0x08},
|
||||
{ 0x20, 0x00, 0x04},
|
||||
{ 0x20, 0x00, 0x00},
|
||||
{ 0x20, 0x04, 0x00},
|
||||
{ 0x20, 0x08, 0x00},
|
||||
{ 0x20, 0x0C, 0x00},
|
||||
{ 0x20, 0x20, 0x00},
|
||||
{ 0x0C, 0x20, 0x00},
|
||||
{ 0x08, 0x20, 0x00},
|
||||
{ 0x04, 0x20, 0x00},
|
||||
{ 0x00, 0x20, 0x00},
|
||||
{ 0x00, 0x20, 0x04},
|
||||
{ 0x00, 0x20, 0x08},
|
||||
{ 0x00, 0x20, 0x0C},
|
||||
{ 0x00, 0x20, 0x20},
|
||||
{ 0x00, 0x0C, 0x20},
|
||||
{ 0x00, 0x08, 0x20},
|
||||
{ 0x00, 0x04, 0x20},
|
||||
{ 0x08, 0x08, 0x20},
|
||||
{ 0x0A, 0x08, 0x20},
|
||||
{ 0x0C, 0x08, 0x20},
|
||||
{ 0x0E, 0x08, 0x20},
|
||||
{ 0x20, 0x08, 0x20},
|
||||
{ 0x20, 0x08, 0x0E},
|
||||
{ 0x20, 0x08, 0x0C},
|
||||
{ 0x20, 0x08, 0x0A},
|
||||
{ 0x20, 0x08, 0x08},
|
||||
{ 0x20, 0x0A, 0x08},
|
||||
{ 0x20, 0x0C, 0x08},
|
||||
{ 0x20, 0x0E, 0x08},
|
||||
{ 0x20, 0x20, 0x08},
|
||||
{ 0x0E, 0x20, 0x08},
|
||||
{ 0x0C, 0x20, 0x08},
|
||||
{ 0x0A, 0x20, 0x08},
|
||||
{ 0x08, 0x20, 0x08},
|
||||
{ 0x08, 0x20, 0x0A},
|
||||
{ 0x08, 0x20, 0x0C},
|
||||
{ 0x08, 0x20, 0x0E},
|
||||
{ 0x08, 0x20, 0x20},
|
||||
{ 0x08, 0x0E, 0x20},
|
||||
{ 0x08, 0x0C, 0x20},
|
||||
{ 0x08, 0x0A, 0x20},
|
||||
{ 0x0B, 0x0B, 0x20},
|
||||
{ 0x0C, 0x0B, 0x20},
|
||||
{ 0x0D, 0x0B, 0x20},
|
||||
{ 0x0F, 0x0B, 0x20},
|
||||
{ 0x20, 0x0B, 0x20},
|
||||
{ 0x20, 0x0B, 0x0F},
|
||||
{ 0x20, 0x0B, 0x0D},
|
||||
{ 0x20, 0x0B, 0x0C},
|
||||
{ 0x20, 0x0B, 0x0B},
|
||||
{ 0x20, 0x0C, 0x0B},
|
||||
{ 0x20, 0x0D, 0x0B},
|
||||
{ 0x20, 0x0F, 0x0B},
|
||||
{ 0x20, 0x20, 0x0B},
|
||||
{ 0x0F, 0x20, 0x0B},
|
||||
{ 0x0D, 0x20, 0x0B},
|
||||
{ 0x0C, 0x20, 0x0B},
|
||||
{ 0x0B, 0x20, 0x0B},
|
||||
{ 0x0B, 0x20, 0x0C},
|
||||
{ 0x0B, 0x20, 0x0D},
|
||||
{ 0x0B, 0x20, 0x0F},
|
||||
{ 0x0B, 0x20, 0x20},
|
||||
{ 0x0B, 0x0F, 0x20},
|
||||
{ 0x0B, 0x0D, 0x20},
|
||||
{ 0x0B, 0x0C, 0x20},
|
||||
/* Pad with NULL */
|
||||
};
|
||||
Loading…
Reference in New Issue