Helios: Set the reset delay for Goodix touchscreen to 120ms
With the 0.71586+ Goodix FW, we can reduce the reset delay from 500ms to 120ms. We should do the change in coreboot device tree after we ensure Helios DVT build is flashed with 0.71586+ Goodix FW. BUG=b:142316026 BRANCH=None TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: I000ee4ea84c598b437992f1000f6e5b561cae605 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philip Chen <philipchen@google.com>
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@ -98,7 +98,7 @@ chip soc/intel/cannonlake
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register "generic.probed" = "1"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
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register "generic.reset_delay_ms" = "500"
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register "generic.reset_delay_ms" = "120"
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register "generic.reset_off_delay_ms" = "3"
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register "generic.reset_off_delay_ms" = "3"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
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register "generic.enable_delay_ms" = "12"
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register "generic.enable_delay_ms" = "12"
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@ -103,7 +103,7 @@ chip soc/intel/cannonlake
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register "generic.probed" = "1"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
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register "generic.reset_delay_ms" = "500"
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register "generic.reset_delay_ms" = "120"
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register "generic.reset_off_delay_ms" = "1"
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register "generic.reset_off_delay_ms" = "1"
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register "generic.enable_gpio" =
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register "generic.enable_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
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"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
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