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fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro 

- Update chipset_fsp_util.h to add the UPD_MEMDOWN_CHECK pointing into
the PcdMemoryParameters structure.  This is baytrail FSP specific, so
it's put into the chipset code instead of the 'driver' code.  Since some
of the values need to be decremented and some do not, a second parameter
was added to control this.  This macro also does not print out the
values as they are printed out separately if memory down is enabled.
- Update chipset_fsp_util.c to use the UPD_MEMDOWN_CHECK macro.  This
makes the code more standardized and easier to read.

Change-Id: I233e45db43af4726cab41f4880f1706cf8abb0b7
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7632
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Martin Roth 2014-12-02 10:49:21 -07:00 committed by Martin Roth
parent 8d936ce853
commit 5c8e7a4075
2 changed files with 65 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
View File

@ -298,57 +298,29 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
printk(BIOS_DEBUG, "Xhci:\t\t\t%s\n", printk(BIOS_DEBUG, "Xhci:\t\t\t%s\n",
UpdData->PcdEnableXhci?"Enabled":"Disabled"); UpdData->PcdEnableXhci?"Enabled":"Disabled");
/* set memory down parameters */ /*
if (config->EnableMemoryDown != MEMORY_DOWN_DEFAULT) { * set memory down parameters
UpdData->PcdMemoryParameters.EnableMemoryDown * Skip setting values if memory down is disabled
= config->EnableMemoryDown - MEMORY_DOWN_DISABLE; * Skip setting values if FSP is earlier than gold 3
*/
if (config->DRAMSpeed != DRAM_SPEED_DEFAULT) { if (FspInfo->ImageRevision >= FSP_GOLD3_REV_ID) {
UpdData->PcdMemoryParameters.DRAMSpeed UPD_MEMDOWN_CHECK(EnableMemoryDown, DECREMENT_FOR_DEFAULT);
= config->DRAMSpeed - DRAM_SPEED_800MHZ; if (UpdData->PcdMemoryParameters.EnableMemoryDown) {
} UPD_MEMDOWN_CHECK(DRAMSpeed, DECREMENT_FOR_DEFAULT);
if (config->DRAMType != DRAM_TYPE_DEFAULT) { UPD_MEMDOWN_CHECK(DRAMType, DECREMENT_FOR_DEFAULT);
UpdData->PcdMemoryParameters.DRAMType UPD_MEMDOWN_CHECK(DIMM0Enable, DECREMENT_FOR_DEFAULT);
= config->DRAMType - DRAM_TYPE_DDR3; UPD_MEMDOWN_CHECK(DIMM1Enable, DECREMENT_FOR_DEFAULT);
} UPD_MEMDOWN_CHECK(DIMMDWidth, DECREMENT_FOR_DEFAULT);
if (config->DIMM0Enable != DIMM0_ENABLE_DEFAULT) { UPD_MEMDOWN_CHECK(DIMMDensity, DECREMENT_FOR_DEFAULT);
UpdData->PcdMemoryParameters.DIMM0Enable UPD_MEMDOWN_CHECK(DIMMBusWidth, DECREMENT_FOR_DEFAULT);
= config->DIMM0Enable - DIMM0_DISABLE; UPD_MEMDOWN_CHECK(DIMMSides, DECREMENT_FOR_DEFAULT);
} UPD_MEMDOWN_CHECK(DIMMtCL, NO_DECREMENT_FOR_DEFAULT);
if (config->DIMM1Enable != DIMM1_ENABLE_DEFAULT) { UPD_MEMDOWN_CHECK(DIMMtRPtRCD, NO_DECREMENT_FOR_DEFAULT);
UpdData->PcdMemoryParameters.DIMM1Enable UPD_MEMDOWN_CHECK(DIMMtWR, NO_DECREMENT_FOR_DEFAULT);
= config->DIMM1Enable - DIMM1_DISABLE; UPD_MEMDOWN_CHECK(DIMMtWTR, NO_DECREMENT_FOR_DEFAULT);
} UPD_MEMDOWN_CHECK(DIMMtRRD, NO_DECREMENT_FOR_DEFAULT);
if (config->DIMMDWidth != DIMM_DWIDTH_DEFAULT) { UPD_MEMDOWN_CHECK(DIMMtRTP, NO_DECREMENT_FOR_DEFAULT);
UpdData->PcdMemoryParameters.DIMMDWidth UPD_MEMDOWN_CHECK(DIMMtFAW, NO_DECREMENT_FOR_DEFAULT);
= config->DIMMDWidth - DIMM_DWIDTH_X8;
}
if (config->DIMMDensity != DIMM_DENSITY_DEFAULT) {
UpdData->PcdMemoryParameters.DIMMDensity
= config->DIMMDensity - DIMM_DENSITY_1G_BIT;
}
if (config->DIMMBusWidth != DIMM_BUS_WIDTH_DEFAULT) {
UpdData->PcdMemoryParameters.DIMMBusWidth
= config->DIMMBusWidth - DIMM_BUS_WIDTH_8BIT;
}
if (config->DIMMSides != DIMM_SIDES_DEFAULT) {
UpdData->PcdMemoryParameters.DIMMSides
= config->DIMMSides - DIMM_SIDES_1RANK;
}
if (config->DIMMtCL != DIMM_TCL_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtCL = config->DIMMtCL;
if (config->DIMMtRPtRCD != DIMM_TRP_TRCD_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtRPtRCD = config->DIMMtRPtRCD;
if (config->DIMMtWR != DIMM_TWR_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtWR = config->DIMMtWR;
if (config->DIMMtWTR != DIMM_TWTR_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtWTR = config->DIMMtWTR;
if (config->DIMMtRRD != DIMM_TRRD_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtRRD = config->DIMMtRRD;
if (config->DIMMtRTP != DIMM_TRTP_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtRTP = config->DIMMtRTP;
if (config->DIMMtFAW != DIMM_TFAW_DEFAULT)
UpdData->PcdMemoryParameters.DIMMtFAW = config->DIMMtFAW;
printk (BIOS_DEBUG, printk (BIOS_DEBUG,
"Memory Down Data Existed : %s\n"\ "Memory Down Data Existed : %s\n"\
@ -385,6 +357,7 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
, UpdData->PcdMemoryParameters.DIMMtFAW , UpdData->PcdMemoryParameters.DIMMtFAW
); );
} }
}
} }
/* Set up the Baytrail specific structures for the call into the FSP */ /* Set up the Baytrail specific structures for the call into the FSP */

8
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h
View File

@ -50,4 +50,12 @@
/* Revision of the FSP binary */ /* Revision of the FSP binary */
#define FSP_GOLD3_REV_ID 0x00000303 #define FSP_GOLD3_REV_ID 0x00000303
#define NO_DECREMENT_FOR_DEFAULT 0
#define DECREMENT_FOR_DEFAULT 1
#define UPD_MEMDOWN_CHECK(member, adjust) \
if (config->member != UPD_DEFAULT) { \
UpdData->PcdMemoryParameters.member = config->member - adjust; \
}
#endif /* CHIPSET_FSP_UTIL_H */ #endif /* CHIPSET_FSP_UTIL_H */