soc/cavium/cn81xx: Use ATF from blobs repo

Use precompiled BL31 from blobs repo.

There's no check for USE_BLOBS here as the included file is "free":
The BL31 is Open-Source and licensed under BSD.

Change-Id: I7e9eb429d11150d43aa070d1bd6a11ea71951ce3
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Patrick Rudolph 2018-04-20 14:43:21 +02:00 committed by Patrick Georgi
parent e15556ed3a
commit 5cdaa3305e
9 changed files with 112 additions and 9 deletions

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@ -17,6 +17,10 @@ config SOC_CAVIUM_CN81XX
if SOC_CAVIUM_CN81XX if SOC_CAVIUM_CN81XX
config ARM64_BL31_EXTERNAL_FILE
string
default "3rdparty/blobs/soc/cavium/cn81xx/bl31.elf"
config ARCH_ARMV8_EXTENSION config ARCH_ARMV8_EXTENSION
int int
default 1 default 1

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@ -65,9 +65,12 @@ ramstage-y += cpu.c
ramstage-y += cpu_secondary.S ramstage-y += cpu_secondary.S
ramstage-y += ecam0.c ramstage-y += ecam0.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
# BDK coreboot interface # BDK coreboot interface
ramstage-y += ../common/bdk-coreboot.c ramstage-y += ../common/bdk-coreboot.c
BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0
CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include

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@ -22,6 +22,8 @@ static struct bl31_plat_param *plat_params;
void register_bl31_param(struct bl31_plat_param *param) void register_bl31_param(struct bl31_plat_param *param)
{ {
ASSERT(param);
param->next = plat_params; param->next = plat_params;
plat_params = param; plat_params = param;
} }

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@ -0,0 +1,44 @@
/*
* Copyright (c) 2018 Facebook Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PLAT_PARAMS_H__
#define __PLAT_PARAMS_H__
#include <stdint.h>
/* param type */
enum {
PARAM_NONE = 0,
PARAM_FDT,
PARAM_COREBOOT_TABLE,
};
/* common header for all plat parameter type */
struct bl31_plat_param {
uint64_t type;
void *next;
};
struct bl31_fdt_param {
struct bl31_plat_param h;
uint64_t fdt_ptr;
};
struct bl31_u64_param {
struct bl31_plat_param h;
uint64_t value;
};
void params_early_setup(void *ptr);
#endif /* __PLAT_PARAMS_H__ */

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@ -17,8 +17,7 @@
#ifndef __BL31_PLAT_PARAMS_H__ #ifndef __BL31_PLAT_PARAMS_H__
#define __BL31_PLAT_PARAMS_H__ #define __BL31_PLAT_PARAMS_H__
// FIXME: use correct path one ATF is upstream #include <atf/plat_params.h>
#include <arm-trusted-firmware/plat/rockchip/common/include/plat_params.h>
void register_bl31_param(struct bl31_plat_param *param); void register_bl31_param(struct bl31_plat_param *param);

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@ -21,8 +21,11 @@
SECTIONS SECTIONS
{ {
DRAM_START(0x00000000) DRAM_START(0x00000000)
/* FIXME: Place BL31 in first 1MiB */ /* Secure region 0 - 1MiB */
REGION(bl31, 0, 0xe0000, 0x1000)
REGION(sff8104, 0xe0000, 0x20000, 0x1000)
/* Insecure region 1MiB - TOP OF DRAM */
/* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */ /* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */
SRAM_START(BOOTROM_OFFSET) SRAM_START(BOOTROM_OFFSET)
STACK(BOOTROM_OFFSET, 16K) STACK(BOOTROM_OFFSET, 16K)

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@ -37,7 +37,10 @@
#include <libbdk-hal/bdk-qlm.h> #include <libbdk-hal/bdk-qlm.h>
#include <libbdk-hal/bdk-config.h> #include <libbdk-hal/bdk-config.h>
#include <libbdk-arch/bdk-csrs-bgx.h> #include <libbdk-arch/bdk-csrs-bgx.h>
#include <bootmem.h>
#include <soc/bl31_plat_params.h>
#include <cbfs.h>
#include <cbmem.h>
#include <fit.h> #include <fit.h>
static const char *QLM_BGX_MODE_MAP[BDK_QLM_MODE_LAST] = { static const char *QLM_BGX_MODE_MAP[BDK_QLM_MODE_LAST] = {
@ -289,18 +292,62 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
return 0; return 0;
} }
extern u8 _bl31[];
extern u8 _ebl31[];
extern u8 _sff8104[];
extern u8 _esff8104[];
void bootmem_platform_add_ranges(void)
{
/* ATF reserved */
bootmem_add_range((uintptr_t)_bl31,
((uintptr_t)_ebl31 - (uintptr_t)_bl31),
BM_MEM_RESERVED);
bootmem_add_range((uintptr_t)_sff8104,
((uintptr_t)_esff8104 - (uintptr_t)_sff8104),
BM_MEM_RESERVED);
/* Scratchpad for ATF SATA quirks */
bootmem_add_range(sdram_size_mb() * KiB, 1 * MiB, BM_MEM_RESERVED);
}
static void soc_read_resources(device_t dev) static void soc_read_resources(device_t dev)
{ {
ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size_mb() * KiB); ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size_mb() * KiB);
} }
static void soc_init_atf(void)
{
static struct bl31_fdt_param fdt_param = {
.h = { .type = PARAM_FDT, },
};
size_t size = 0;
void *ptr = cbfs_boot_map_with_leak("sff8104-linux.dtb",
CBFS_TYPE_RAW, &size);
if (ptr)
memcpy(_sff8104, ptr, size);
/* Point to devicetree in secure memory */
fdt_param.fdt_ptr = (uintptr_t)_sff8104;
register_bl31_param(&fdt_param.h);
static struct bl31_u64_param cbtable_param = {
.h = { .type = PARAM_COREBOOT_TABLE, },
};
/* Point to coreboot tables */
cbtable_param.value = (uint64_t)cbmem_find(CBMEM_ID_CBTABLE);
if (cbtable_param.value)
register_bl31_param(&cbtable_param.h);
}
static void soc_init(device_t dev) static void soc_init(device_t dev)
{ {
/* Init ECAM, MDIO, PEM, PHY, QLM ... */ /* Init ECAM, MDIO, PEM, PHY, QLM ... */
bdk_boot(); bdk_boot();
/* TODO: additional trustzone init */
if (IS_ENABLED(CONFIG_PAYLOAD_FIT_SUPPORT)) { if (IS_ENABLED(CONFIG_PAYLOAD_FIT_SUPPORT)) {
struct device_tree_fixup *dt_fixup; struct device_tree_fixup *dt_fixup;
@ -311,6 +358,9 @@ static void soc_init(device_t dev)
&device_tree_fixups); &device_tree_fixups);
} }
} }
if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE))
soc_init_atf();
} }
static void soc_final(device_t dev) static void soc_final(device_t dev)

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@ -4,8 +4,7 @@ config SOC_CAVIUM_COMMON
select BOOTBLOCK_CUSTOM select BOOTBLOCK_CUSTOM
select CAVIUM_BDK select CAVIUM_BDK
select FLATTENED_DEVICE_TREE select FLATTENED_DEVICE_TREE
# FIXME: No Cavium support in ATF select ARM64_USE_ARM_TRUSTED_FIRMWARE
# select ARM64_USE_ARM_TRUSTED_FIRMWARE
if SOC_CAVIUM_COMMON if SOC_CAVIUM_COMMON

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@ -29,7 +29,6 @@ romstage-y += bdk-coreboot.c
# ramstage # ramstage
ramstage-y += cbmem.c ramstage-y += cbmem.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
CPPFLAGS_common += -Isrc/soc/cavium/common/include CPPFLAGS_common += -Isrc/soc/cavium/common/include