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AGESA boards: Drop commented out code 

Change-Id: I9db1147c5e112e5e6832eeece2214fece8aa6b83
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Kyösti Mälkki 2019-12-02 05:09:11 +02:00
parent f824378526
commit 5cdbce8072
4 changed files with 0 additions and 152 deletions
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38
src/mainboard/amd/olivehill/mptable.c
View File

@ -99,45 +99,7 @@ static void *smp_write_config_table(void *v)
outb(byte | 0x80, 0xC00);
outb(intr_data[byte], 0xC01);
}
#if 0
outb(0x0B, 0xCD6);
outb(0x02, 0xCD7);
outb(0x50, 0xCD6);
outb(0x1F, 0xCD7);
outb(0x48, 0xCD6);
outb(0xF2, 0xCD7);
//outb(0xBE, 0xCD6);
//outb(0x52, 0xCD7);
outb(0xED, 0xCD6);
outb(0x17, 0xCD7);
*(volatile u8 *) (0xFED80D00 + 0x31) = 2;
*(volatile u8 *) (0xFED80D00 + 0x32) = 2;
*(volatile u8 *) (0xFED80D00 + 0x33) = 2;
*(volatile u8 *) (0xFED80D00 + 0x34) = 2;
*(volatile u8 *) (0xFED80100 + 0x31) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x32) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x33) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x34) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0x6c) = 1;
*(volatile u8 *) (0xFED80D00 + 0x6E) = 2;
*(volatile u8 *) (0xFED80D00 + 0x6f) = 2;
*(volatile u8 *) (0xFED80100 + 0x6c) = 0xa0;
*(volatile u8 *) (0xFED80100 + 0x6E) = 0xa8;
*(volatile u8 *) (0xFED80100 + 0x6f) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0xA6) = 2;
*(volatile u8 *) (0xFED80100 + 0xA6) = 0;
*(volatile u8 *) (0xFED80100 + 0x40) = 0xC8;
#endif
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));

38
src/mainboard/asrock/imb-a180/mptable.c
View File

@ -100,45 +100,7 @@ static void *smp_write_config_table(void *v)
outb(byte | 0x80, 0xC00);
outb(intr_data[byte], 0xC01);
}
#if 0
outb(0x0B, 0xCD6);
outb(0x02, 0xCD7);
outb(0x50, 0xCD6);
outb(0x1F, 0xCD7);
outb(0x48, 0xCD6);
outb(0xF2, 0xCD7);
//outb(0xBE, 0xCD6);
//outb(0x52, 0xCD7);
outb(0xED, 0xCD6);
outb(0x17, 0xCD7);
*(volatile u8 *) (0xFED80D00 + 0x31) = 2;
*(volatile u8 *) (0xFED80D00 + 0x32) = 2;
*(volatile u8 *) (0xFED80D00 + 0x33) = 2;
*(volatile u8 *) (0xFED80D00 + 0x34) = 2;
*(volatile u8 *) (0xFED80100 + 0x31) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x32) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x33) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x34) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0x6c) = 1;
*(volatile u8 *) (0xFED80D00 + 0x6E) = 2;
*(volatile u8 *) (0xFED80D00 + 0x6f) = 2;
*(volatile u8 *) (0xFED80100 + 0x6c) = 0xa0;
*(volatile u8 *) (0xFED80100 + 0x6E) = 0xa8;
*(volatile u8 *) (0xFED80100 + 0x6f) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0xA6) = 2;
*(volatile u8 *) (0xFED80100 + 0xA6) = 0;
*(volatile u8 *) (0xFED80100 + 0x40) = 0xC8;
#endif
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));

38
src/mainboard/biostar/a68n_5200/mptable.c
View File

@ -99,45 +99,7 @@ static void *smp_write_config_table(void *v)
outb(byte | 0x80, 0xC00);
outb(intr_data[byte], 0xC01);
}
#if 0
outb(0x0B, 0xCD6);
outb(0x02, 0xCD7);
outb(0x50, 0xCD6);
outb(0x1F, 0xCD7);
outb(0x48, 0xCD6);
outb(0xF2, 0xCD7);
//outb(0xBE, 0xCD6);
//outb(0x52, 0xCD7);
outb(0xED, 0xCD6);
outb(0x17, 0xCD7);
*(volatile u8 *) (0xFED80D00 + 0x31) = 2;
*(volatile u8 *) (0xFED80D00 + 0x32) = 2;
*(volatile u8 *) (0xFED80D00 + 0x33) = 2;
*(volatile u8 *) (0xFED80D00 + 0x34) = 2;
*(volatile u8 *) (0xFED80100 + 0x31) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x32) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x33) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x34) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0x6c) = 1;
*(volatile u8 *) (0xFED80D00 + 0x6E) = 2;
*(volatile u8 *) (0xFED80D00 + 0x6f) = 2;
*(volatile u8 *) (0xFED80100 + 0x6c) = 0xa0;
*(volatile u8 *) (0xFED80100 + 0x6E) = 0xa8;
*(volatile u8 *) (0xFED80100 + 0x6f) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0xA6) = 2;
*(volatile u8 *) (0xFED80100 + 0xA6) = 0;
*(volatile u8 *) (0xFED80100 + 0x40) = 0xC8;
#endif
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));

38
src/mainboard/hp/abm/mptable.c
View File

@ -99,45 +99,7 @@ static void *smp_write_config_table(void *v)
outb(byte | 0x80, 0xC00);
outb(intr_data[byte], 0xC01);
}
#if 0
outb(0x0B, 0xCD6);
outb(0x02, 0xCD7);
outb(0x50, 0xCD6);
outb(0x1F, 0xCD7);
outb(0x48, 0xCD6);
outb(0xF2, 0xCD7);
//outb(0xBE, 0xCD6);
//outb(0x52, 0xCD7);
outb(0xED, 0xCD6);
outb(0x17, 0xCD7);
*(volatile u8 *) (0xFED80D00 + 0x31) = 2;
*(volatile u8 *) (0xFED80D00 + 0x32) = 2;
*(volatile u8 *) (0xFED80D00 + 0x33) = 2;
*(volatile u8 *) (0xFED80D00 + 0x34) = 2;
*(volatile u8 *) (0xFED80100 + 0x31) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x32) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x33) = 0xc8;
*(volatile u8 *) (0xFED80100 + 0x34) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0x6c) = 1;
*(volatile u8 *) (0xFED80D00 + 0x6E) = 2;
*(volatile u8 *) (0xFED80D00 + 0x6f) = 2;
*(volatile u8 *) (0xFED80100 + 0x6c) = 0xa0;
*(volatile u8 *) (0xFED80100 + 0x6E) = 0xa8;
*(volatile u8 *) (0xFED80100 + 0x6f) = 0xa0;
*(volatile u8 *) (0xFED80D00 + 0xA6) = 2;
*(volatile u8 *) (0xFED80100 + 0xA6) = 0;
*(volatile u8 *) (0xFED80100 + 0x40) = 0xC8;
#endif
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));