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Remove VIA C3 CPU support 

Change-Id: Ib33c05cec60238f17b68e3e729c1a9e125bfb179
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2018-05-24 02:02:42 +03:00
parent f99fa1058d
commit 5ceaf7bf5f
4 changed files with 0 additions and 73 deletions
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1
src/cpu/via/Makefile.inc
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@ -1,3 +1,2 @@
subdirs-$(CONFIG_CPU_VIA_C7) += c7
subdirs-$(CONFIG_CPU_VIA_C3) += c3
subdirs-$(CONFIG_CPU_VIA_NANO) += nano

16
src/cpu/via/c3/Kconfig
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@ -1,16 +0,0 @@
config CPU_VIA_C3
bool
if CPU_VIA_C3
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select UDELAY_TSC
select MMX
select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
endif # CPU_VIA_C3

8
src/cpu/via/c3/Makefile.inc
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@ -1,8 +0,0 @@
subdirs-y += ../../x86/tsc
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
subdirs-y += ../../intel/microcode
ramstage-y += c3_init.c

48
src/cpu/via/c3/c3_init.c
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@ -1,48 +0,0 @@
/*
* This file is part of the coreboot project.
*
* (C) 2007-2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
static void c3_init(struct device *dev)
{
x86_enable_cache();
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local CPU APICs */
setup_lapic();
};
static struct device_operations cpu_dev_ops = {
.init = c3_init,
};
static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_CENTAUR, 0x0670 }, // VIA C3 Samual 2 + Ezra
{ X86_VENDOR_CENTAUR, 0x0680 }, // VIA C3 Ezra-T
{ X86_VENDOR_CENTAUR, 0x0690 }, // VIA C3 Nehemiah
{ 0, 0 },
};
static const struct cpu_driver driver __cpu_driver = {
.ops = &cpu_dev_ops,
.id_table = cpu_table,
};