tyan/s8226: Remove a trailing whitespace

Change-Id: Ic47cf1b55fc0d8b22d30d822b1744847e84d5a43
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6326
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

src/mainboard/tyan/s8226/buildOpts.c

@@ -30,15 +30,15 @@
  * coreboot enable -Wundef option, so we should make sure we have all contanstand defined
  */
 /* MEMORY_BUS_SPEED */
-#define  DDR400_FREQUENCY		200	///< DDR 400
+#define DDR400_FREQUENCY		200	///< DDR 400
-#define  DDR533_FREQUENCY		266	///< DDR 533
+#define DDR533_FREQUENCY		266	///< DDR 533
-#define  DDR667_FREQUENCY		333	///< DDR 667
+#define DDR667_FREQUENCY		333	///< DDR 667
-#define  DDR800_FREQUENCY		400	///< DDR 800
+#define DDR800_FREQUENCY		400	///< DDR 800
-#define  DDR1066_FREQUENCY		533	///< DDR 1066
+#define DDR1066_FREQUENCY		533	///< DDR 1066
-#define  DDR1333_FREQUENCY		667	///< DDR 1333
+#define DDR1333_FREQUENCY		667	///< DDR 1333
-#define  DDR1600_FREQUENCY		800	///< DDR 1600
+#define DDR1600_FREQUENCY		800	///< DDR 1600
-#define  DDR1866_FREQUENCY		933	///< DDR 1866
+#define DDR1866_FREQUENCY		933	///< DDR 1866
-#define  UNSUPPORTED_DDR_FREQUENCY	934	///< Highest limit of DDR frequency
+#define UNSUPPORTED_DDR_FREQUENCY	934	///< Highest limit of DDR frequency
 
 /* QUANDRANK_TYPE*/
 #define QUADRANK_REGISTERED		0	///< Quadrank registered DIMM

src/mainboard/tyan/s8226/platform_cfg.h

@@ -31,13 +31,13 @@
  *  Enable check for PCIe endpoint to be ready for PCI enumeration.
  *
  */
-//#define  EPREADY_WORKAROUND_DISABLED
+//#define EPREADY_WORKAROUND_DISABLED
 
 /**
  *  Enable IOMMU support. Initialize IOMMU subsystem, generate IVRS ACPI table.
  *
  */
-#define  IOMMU_SUPPORT_DISABLE //TODO: enable it
+#define IOMMU_SUPPORT_DISABLE //TODO: enable it
 
 /**
  *  Disable server PCIe hotplug support.