From 5d7c3a4f013d650aab87a71e6468e89586846703 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 29 Oct 2020 21:18:14 +0100 Subject: [PATCH] nb/intel/haswell/northbridge.c: Correct DPR handling DPR size is in MiB, but the range boundaries are expressed in KiB. In addition, DPR and TSEG use the same attributes, so unify both regions. Also improve a comment about DPR, since `is special` is uninformative. Change-Id: I4479483e17890b5a4c39165138fa1c5f8215bc84 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46987 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/northbridge/intel/haswell/northbridge.c | 25 +++++++++------------ 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 130c0ff8ac..df9cc184d1 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -251,7 +251,12 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) mc_read_map_entries(dev, &mc_values[0]); mc_report_map_entries(dev, &mc_values[0]); - /* The DPR register is special */ + /* + * DMA Protected Range can be reserved below TSEG for PCODE patch + * or TXT/BootGuard related data. Rather than report a base address, + * the DPR register reports the TOP of the region, which is the same + * as TSEG base. The region size is reported in MiB in bits 11:4. + */ const union dpr_register dpr = { .raw = pci_read_config32(dev, DPR), }; @@ -290,23 +295,15 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) size_k = (0xa0000 >> 10) - base_k; ram_resource(dev, index++, base_k, size_k); - /* 0xc0000 -> DPR base */ + /* 0xc0000 -> TSEG - DPR */ base_k = 0xc0000 >> 10; - size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - (base_k + dpr.size); + size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - base_k; + size_k -= dpr.size >> 10; ram_resource(dev, index++, base_k, size_k); - /* DPR base -> TSEG */ - if (dpr.size) { - resource = new_resource(dev, index++); - resource->base = (dpr.top - dpr.size) * MiB; - resource->size = dpr.size * MiB; - resource->flags = IORESOURCE_MEM | IORESOURCE_STORED | IORESOURCE_CACHEABLE | - IORESOURCE_RESERVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - } - - /* TSEG -> BGSM */ + /* TSEG - DPR -> BGSM */ resource = new_resource(dev, index++); - resource->base = mc_values[TSEG_REG]; + resource->base = mc_values[TSEG_REG] - dpr.size; resource->size = mc_values[BGSM_REG] - resource->base; resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED | IORESOURCE_CACHEABLE;