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asus/p2b*: Move serial init into mainboard bootblock 

With this bootblock messages are transmitted over serial too.

TEST=Serial messages transmitted normally on asus/p2b-ls.

Change-Id: I6f3ee68e7c76a8c6db6d75956e6a7fb75ef83850
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2020-02-02 00:26:59 -05:00 committed by Angel Pons
parent b7c11c6953
commit 5d8ad8598b
4 changed files with 15 additions and 29 deletions
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2
src/mainboard/asus/p2b/Makefile.inc
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@ -1,2 +1,4 @@
bootblock-y += bootblock.c
ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += variants/$(VARIANT_DIR)/irq_tables.c ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += variants/$(VARIANT_DIR)/irq_tables.c
ramstage-$(CONFIG_GENERATE_MP_TABLE) += variants/$(VARIANT_DIR)/mptable.c ramstage-$(CONFIG_GENERATE_MP_TABLE) += variants/$(VARIANT_DIR)/mptable.c

13
src/mainboard/asus/p2b/bootblock.c Normal file
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@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
#include <bootblock_common.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
void bootblock_mainboard_early_init(void)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}

25
src/mainboard/asus/p2b/romstage.c
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@ -1,25 +0,0 @@
/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <northbridge/intel/i440bx/raminit.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
void mainboard_enable_serial(void)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}

4
src/northbridge/intel/i440bx/romstage.c
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@ -14,15 +14,11 @@
#include <arch/romstage.h> #include <arch/romstage.h>
#include <cbmem.h> #include <cbmem.h>
#include <console/console.h>
#include <southbridge/intel/i82371eb/i82371eb.h> #include <southbridge/intel/i82371eb/i82371eb.h>
#include <northbridge/intel/i440bx/raminit.h> #include <northbridge/intel/i440bx/raminit.h>
void mainboard_romstage_entry(void) void mainboard_romstage_entry(void)
{ {
mainboard_enable_serial();
console_init();
i82371eb_early_init(); i82371eb_early_init();
sdram_initialize(); sdram_initialize();