mb/google/zork: correct MST probes
It turns out that putting a device ref in an overridetree at a different point in the tree will generate a duplicate device definition, such that the change introducing this support was ignoring the device presence specified by overridetree.cb and only using the baseboard configuration. I believe testing of that change was not redone after the baseboard was changed to disable the MST, so that conflicting behavior was not noticed. The incorrect behavior generated a disabled device for the MST at the location specified by the baseboard, and one with the probe as a child of the soc. At runtime this did a fw_config probe of the "I2C 00:4a" device, and later probed a different "I2C 00:4a" which was already disabled. As the disabled one came later, it seems to have completely disabled the MST, discarding the results of the variant-specific probe. BUG=b:185862297 TEST=10EC2141 device is now present on a Dali berknip BRANCH=zork Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57298 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -372,7 +372,7 @@ chip soc/amd/picasso
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end
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device ref lpc_bridge on
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chip ec/google/chromeec
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device pnp 0c09.0 on
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device pnp 0c09.0 alias cros_ec on
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chip ec/google/chromeec/i2c_tunnel
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register "uid" = "0"
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register "remote_bus" = "8"
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@ -398,7 +398,7 @@ chip soc/amd/picasso
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register "name" = ""MSTH""
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register "uid" = "1"
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register "remote_bus" = "9"
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device generic 1.0 on
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device generic 1.0 alias cros_ec_i2c_9 on
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chip drivers/i2c/generic
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register "hid" = ""10EC2141""
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register "name" = ""MSTH""
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@ -104,6 +104,22 @@ chip soc/amd/picasso
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# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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device ref lpc_bridge on
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chip ec/google/chromeec
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device ref cros_ec on
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chip ec/google/chromeec/i2c_tunnel
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device ref cros_ec_i2c_9 on
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chip drivers/i2c/generic
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device ref db_mst on
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probe USB_DAUGHTERBOARD BERKNIP_DB_DALI
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end
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end
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end
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end
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end
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end
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end
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end # domain
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device ref i2c_2 on
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@ -179,8 +195,4 @@ chip soc/amd/picasso
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end
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end
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device ref db_mst on
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probe USB_DAUGHTERBOARD BERKNIP_DB_DALI
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end
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end # chip soc/amd/picasso
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@ -80,6 +80,22 @@ chip soc/amd/picasso
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# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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device ref lpc_bridge on
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chip ec/google/chromeec
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device ref cros_ec on
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chip ec/google/chromeec/i2c_tunnel
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device ref cros_ec_i2c_9 on
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chip drivers/i2c/generic
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device ref db_mst on
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probe USB_DAUGHTERBOARD MORPHIUS_DB_DALI
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end
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end
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end
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end
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end
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end
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end
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end # domain
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device ref i2c_2 on
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@ -144,8 +160,4 @@ chip soc/amd/picasso
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end
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end
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device ref db_mst on
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probe USB_DAUGHTERBOARD MORPHIUS_DB_DALI
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end
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end # chip soc/amd/picasso
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@ -53,6 +53,22 @@ chip soc/amd/picasso
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# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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device ref lpc_bridge on
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chip ec/google/chromeec
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device ref cros_ec on
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chip ec/google/chromeec/i2c_tunnel
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device ref cros_ec_i2c_9 on
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chip drivers/i2c/generic
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device ref db_mst on
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probe USB_DAUGHTERBOARD TREMBYLE_DB_DALI_HDMI
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end
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end
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end
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end
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end
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end
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end
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end # domain
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device ref i2c_2 on
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@ -113,8 +129,4 @@ chip soc/amd/picasso
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end
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end
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device ref db_mst on
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probe USB_DAUGHTERBOARD TREMBYLE_DB_DALI_HDMI
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end
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end # chip soc/amd/picasso
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@ -87,6 +87,22 @@ chip soc/amd/picasso
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chip drivers/usb/acpi
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device usb 3.2 off end
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end
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device ref lpc_bridge on
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chip ec/google/chromeec
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device ref cros_ec on
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chip ec/google/chromeec/i2c_tunnel
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device ref cros_ec_i2c_9 on
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chip drivers/i2c/generic
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device ref db_mst on
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probe USB_DAUGHTERBOARD WOOMAX_DB_DALI
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end
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end
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end
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end
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end
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end
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end
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end # domain
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device ref i2c_2 on
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@ -117,8 +133,4 @@ chip soc/amd/picasso
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end
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end
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device ref db_mst on
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probe USB_DAUGHTERBOARD WOOMAX_DB_DALI
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end
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end # chip soc/amd/picasso
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