diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup.c b/src/southbridge/nvidia/ck804/ck804_early_setup.c
index b6838a9f8f..d5e1aee23c 100644
--- a/src/southbridge/nvidia/ck804/ck804_early_setup.c
+++ b/src/southbridge/nvidia/ck804/ck804_early_setup.c
@@ -260,6 +260,31 @@ static void ck804_early_setup(void)
         RES_PORT_IO_32, CK804B_ANACTRL_IO_BASE + 0x24, 0xfcffff0f, 0x020000b0,
 #endif
 
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x50), ~(0x1f000013), 0x15000013,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x64), ~(0x00000001), 0x00000001,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x68), ~(0x02000000), 0x02000000,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x70), ~(0x000f0000), 0x00040000,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0xa0), ~(0x000001ff), 0x00000150,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0xac), ~(0xffff8f00), 0x02aa8b00,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x7c), ~(0x00000010), 0x00000000,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0xc8), ~(0x0fff0fff), 0x000a000a, 
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0xd0), ~(0xf0000000), 0x00000000,
+    RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0xe0), ~(0xf0000000), 0x00000000,
+#if  CK804_NUM > 1
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0x50), ~(0x1f000013), 0x15000013,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0x64), ~(0x00000001), 0x00000001,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0x68), ~(0x02000000), 0x02000000,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0x70), ~(0x000f0000), 0x00040000,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0xa0), ~(0x000001ff), 0x00000150,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0xac), ~(0xffff8f00), 0x02aa8b00,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0x7c), ~(0x00000010), 0x00000000,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0xc8), ~(0x0fff0fff), 0x000a000a,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0xd0), ~(0xf0000000), 0x00000000,
+    RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804_DEVN_BASE+8 , 0, 0xe0), ~(0xf0000000), 0x00000000,
+
+#endif
+
+
 		RES_PORT_IO_32, ANACTRL_IO_BASE + 0x04, ~((0x3ff<<0)|(0x3ff<<10)), (0x21<<0)|(0x22<<10),
 #if CK804_NUM > 1
 		RES_PORT_IO_32, CK804B_ANACTRL_IO_BASE + 0x04, ~((0x3ff<<0)|(0x3ff<<10)), (0x21<<0)|(0x22<<10),
diff --git a/src/southbridge/nvidia/ck804/ck804_sata.c b/src/southbridge/nvidia/ck804/ck804_sata.c
index 97744f6823..0b5f41b071 100644
--- a/src/southbridge/nvidia/ck804/ck804_sata.c
+++ b/src/southbridge/nvidia/ck804/ck804_sata.c
@@ -95,11 +95,13 @@ static void sata_init(struct device *dev)
                 dword |= (1<<1);
                 printk_debug("SATA P \n");
         }
+#if 0
 //	write back
         dword |= (1<<12);
         dword |= (1<<14);
+#endif
 
-#if 1
+#if 0
 //	ADMA
 	dword |= (1<<16);
 	dword |= (1<<17);
@@ -112,7 +114,7 @@ static void sata_init(struct device *dev)
 #endif
         pci_write_config32(dev, 0x50, dword);
 
-#if 1
+#if 0
 //SLUMBER_DURING_D3.
         dword = pci_read_config32(dev, 0x7c);
         dword &=  ~(1<<4);