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Exynos5: Drop S5P directory and merge files 

s5p-common mostly contained duplicate files, drop the whole directory
and merge the few pieces that we are using into exynos5-common.

Change-Id: I5f18e8a6d2379d719ab6bbbf817fe15bda70d17f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2405
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Stefan Reinauer 2013-02-14 16:35:47 -08:00 committed by Stefan Reinauer
parent 7512e4593e
commit 5dbf689b62
30 changed files with 279 additions and 584 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/cpu/samsung/Kconfig
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@ -1,10 +1,5 @@
config CPU_SAMSUNG_EXYNOS
bool
default n
config CPU_SAMSUNG_EXYNOS5 config CPU_SAMSUNG_EXYNOS5
depends on ARCH_ARMV7 depends on ARCH_ARMV7
select CPU_SAMSUNG_EXYNOS
select HAVE_UART_SPECIAL select HAVE_UART_SPECIAL
select DEFAULT_EARLY_CONSOLE select DEFAULT_EARLY_CONSOLE
bool bool

3
src/cpu/samsung/Makefile.inc
View File

@ -1,5 +1,2 @@
subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5) += exynos5-common subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5) += exynos5-common
subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5) += exynos5250 subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5) += exynos5250
# S5P is a predecessor to Exynos
subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS) += s5p-common

18
src/cpu/samsung/exynos5-common/Makefile.inc
View File

@ -1,3 +1,21 @@
romstage-y += spi.c romstage-y += spi.c
ramstage-y += spi.c ramstage-y += spi.c
bootblock-y += spi.c bootblock-y += spi.c
bootblock-y += gpio.c
bootblock-$(CONFIG_EARLY_CONSOLE) += pwm.c
bootblock-$(CONFIG_EARLY_CONSOLE) += timer.c
romstage-y += pwm.c # needed by timer.c
romstage-y += gpio.c
romstage-y += timer.c
romstage-y += i2c.c
#romstage-y += wdt.c
#romstage-y += sromc.c
ramstage-y += cpu_info.c
ramstage-y += pwm.c # needed by timer.c
ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += i2c.c

5
src/cpu/samsung/exynos5-common/clk.h
View File

@ -52,12 +52,11 @@ struct clk_bit_info {
s8 prediv_bit; s8 prediv_bit;
}; };
/* FIXME(dhendrix) conflicts with s5p-common/clk.h */
#if 0
unsigned long get_pll_clk(int pllreg); unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void); unsigned long get_arm_clk(void);
unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div); void set_mmc_clk(int dev_index, unsigned int div);
#endif
/** /**
* get the clk frequency of the required peripherial * get the clk frequency of the required peripherial

0
src/cpu/samsung/s5p-common/clock.h → src/cpu/samsung/exynos5-common/clock.h
View File

93
src/cpu/samsung/exynos5-common/cpu.h
View File

@ -1,6 +1,7 @@
/* /*
* (C) Copyright 2010 Samsung Electronics * (C) Copyright 2009-2010 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com> * Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as * modify it under the terms of the GNU General Public License as
@ -22,7 +23,95 @@
#ifndef _EXYNOS_COMMON_CPU_H #ifndef _EXYNOS_COMMON_CPU_H
#define _EXYNOS_COMMON_CPU_H #define _EXYNOS_COMMON_CPU_H
#include <cpu/samsung/s5p-common/cpu.h> #define S5PC1XX_ADDR_BASE 0xE0000000
/* S5PC100 */
#define S5PC100_PRO_ID 0xE0000000
#define S5PC100_CLOCK_BASE 0xE0100000
#define S5PC100_GPIO_BASE 0xE0300000
#define S5PC100_VIC0_BASE 0xE4000000
#define S5PC100_VIC1_BASE 0xE4100000
#define S5PC100_VIC2_BASE 0xE4200000
#define S5PC100_DMC_BASE 0xE6000000
#define S5PC100_SROMC_BASE 0xE7000000
#define S5PC100_ONENAND_BASE 0xE7100000
#define S5PC100_PWMTIMER_BASE 0xEA000000
#define S5PC100_WATCHDOG_BASE 0xEA200000
#define S5PC100_UART_BASE 0xEC000000
#define S5PC100_MMC_BASE 0xED800000
/* S5PC110 */
#define S5PC110_PRO_ID 0xE0000000
#define S5PC110_CLOCK_BASE 0xE0100000
#define S5PC110_GPIO_BASE 0xE0200000
#define S5PC110_PWMTIMER_BASE 0xE2500000
#define S5PC110_WATCHDOG_BASE 0xE2700000
#define S5PC110_UART_BASE 0xE2900000
#define S5PC110_SROMC_BASE 0xE8000000
#define S5PC110_MMC_BASE 0xEB000000
#define S5PC110_DMC0_BASE 0xF0000000
#define S5PC110_DMC1_BASE 0xF1400000
#define S5PC110_VIC0_BASE 0xF2000000
#define S5PC110_VIC1_BASE 0xF2100000
#define S5PC110_VIC2_BASE 0xF2200000
#define S5PC110_VIC3_BASE 0xF2300000
#define S5PC110_OTG_BASE 0xEC000000
#define S5PC110_PHY_BASE 0xEC100000
#define S5PC110_USB_PHY_CONTROL 0xE010E80C
#include <arch/io.h>
/* CPU detection macros */
extern unsigned int s5p_cpu_id;
/* FIXME(dhendrix): conflicts with the one in cpu_info.c ... */
#if 0
inline void s5p_set_cpu_id(void)
{
s5p_cpu_id = readl(S5PC100_PRO_ID);
s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12);
}
#endif
inline void s5p_set_cpu_id(void);
#define IS_SAMSUNG_TYPE(type, id) \
static inline int cpu_is_##type(void) \
{ \
return s5p_cpu_id == id ? 1 : 0; \
}
IS_SAMSUNG_TYPE(s5pc100, 0xc100)
IS_SAMSUNG_TYPE(s5pc110, 0xc110)
/*
* FIXME(dhendrix): collides with SAMSUNG_BASE in exynos header files. We
* don't really care about old S5P processors right now.
*/
#if 0
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
if (cpu_is_s5pc100()) \
return S5PC100_##base; \
else if (cpu_is_s5pc110()) \
return S5PC110_##base; \
else \
return 0; \
}
SAMSUNG_BASE(clock, CLOCK_BASE)
SAMSUNG_BASE(gpio, GPIO_BASE)
SAMSUNG_BASE(pro_id, PRO_ID)
SAMSUNG_BASE(mmc, MMC_BASE)
SAMSUNG_BASE(sromc, SROMC_BASE)
SAMSUNG_BASE(timer, PWMTIMER_BASE)
SAMSUNG_BASE(uart, UART_BASE)
SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
#endif
int s5p_get_cpu_rev(void);
//void s5p_set_cpu_id(void);
int s5p_get_cpu_id(void);
#define DEVICE_NOT_AVAILABLE 0 #define DEVICE_NOT_AVAILABLE 0

6
src/cpu/samsung/s5p-common/cpu_info.c → src/cpu/samsung/exynos5-common/cpu_info.c
View File

@ -29,9 +29,9 @@
#endif #endif
#include <arch/io.h> #include <arch/io.h>
#include <cpu/samsung/s5p-common/clk.h> #include <cpu/samsung/exynos5-common/clk.h>
#include <cpu/samsung/s5p-common/clock.h> #include <cpu/samsung/exynos5-common/clock.h>
#include <cpu/samsung/s5p-common/cpu.h> #include <cpu/samsung/exynos5-common/cpu.h>
#include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/dmc.h>
#include <cpu/samsung/exynos5-common/cpu.h> /* for EXYNOS_PRO_ID */ #include <cpu/samsung/exynos5-common/cpu.h> /* for EXYNOS_PRO_ID */

15
src/cpu/samsung/s5p-common/s5p_gpio.c → src/cpu/samsung/exynos5-common/gpio.c
View File

@ -25,7 +25,6 @@
#include <gpio.h> #include <gpio.h>
#include <arch/gpio.h> #include <arch/gpio.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/samsung/s5p-common/gpio.h>
#include <cpu/samsung/exynos5-common/gpio.h> #include <cpu/samsung/exynos5-common/gpio.h>
#include <cpu/samsung/exynos5250/gpio.h> /* FIXME: for gpio_decode_number prototype */ #include <cpu/samsung/exynos5250/gpio.h> /* FIXME: for gpio_decode_number prototype */
@ -48,8 +47,6 @@ struct gpio_info {
unsigned int max_gpio; /* Maximum GPIO in this part */ unsigned int max_gpio; /* Maximum GPIO in this part */
}; };
#ifdef CONFIG_CPU_SAMSUNG_EXYNOS5
#include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/cpu.h>
static const struct gpio_info gpio_data[EXYNOS_GPIO_NUM_PARTS] = { static const struct gpio_info gpio_data[EXYNOS_GPIO_NUM_PARTS] = {
{ EXYNOS5_GPIO_PART1_BASE, GPIO_MAX_PORT_PART_1 }, { EXYNOS5_GPIO_PART1_BASE, GPIO_MAX_PORT_PART_1 },
@ -62,18 +59,6 @@ static const struct gpio_info gpio_data[EXYNOS_GPIO_NUM_PARTS] = {
#define HAVE_GENERIC_GPIO #define HAVE_GENERIC_GPIO
#elif defined(CONFIG_CPU_SAMSUNG_EXYNOS4)
static const struct gpio_info gpio_data[EXYNOS_GPIO_NUM_PARTS] = {
{ EXYNOS4_GPIO_PART1_BASE, GPIO_MAX_PORT_PART_1 },
{ EXYNOS4_GPIO_PART2_BASE, GPIO_MAX_PORT_PART_2 },
{ EXYNOS4_GPIO_PART3_BASE, GPIO_MAX_PORT_PART_3 },
};
#define HAVE_GENERIC_GPIO
#endif
/* This macro gets gpio pin offset from 0..7 */ /* This macro gets gpio pin offset from 0..7 */
#define GPIO_BIT(x) ((x) & 0x7) #define GPIO_BIT(x) ((x) & 0x7)

156
src/cpu/samsung/exynos5-common/gpio.h
View File

@ -1,5 +1,5 @@
/* /*
* (C) Copyright 2010 Samsung Electronics * (C) Copyright 2009-2010 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com> * Minkyu Kang <mk7.kang@samsung.com>
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
@ -22,9 +22,155 @@
#define __ASM_ARCH_COMMON_GPIO_H #define __ASM_ARCH_COMMON_GPIO_H
#ifndef __ASSEMBLER__ /* FIXME: not needed (i hope)? */ #ifndef __ASSEMBLER__ /* FIXME: not needed (i hope)? */
#include <cpu/samsung/s5p-common/gpio.h>
/* FIXME: s5p's gpio.h and exynos' gpio.h have a lot of conflicting #include <cpu/samsung/exynos5-common/cpu.h> /* FIXME: for S5PC110_GPIO_BASE */
definitions */
struct s5p_gpio_bank {
unsigned int con;
unsigned int dat;
unsigned int pull;
unsigned int drv;
unsigned int pdn_con;
unsigned int pdn_pull;
unsigned char res1[8];
};
struct s5pc100_gpio {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
struct s5p_gpio_bank b;
struct s5p_gpio_bank c;
struct s5p_gpio_bank d;
struct s5p_gpio_bank e0;
struct s5p_gpio_bank e1;
struct s5p_gpio_bank f0;
struct s5p_gpio_bank f1;
struct s5p_gpio_bank f2;
struct s5p_gpio_bank f3;
struct s5p_gpio_bank g0;
struct s5p_gpio_bank g1;
struct s5p_gpio_bank g2;
struct s5p_gpio_bank g3;
struct s5p_gpio_bank i;
struct s5p_gpio_bank j0;
struct s5p_gpio_bank j1;
struct s5p_gpio_bank j2;
struct s5p_gpio_bank j3;
struct s5p_gpio_bank j4;
struct s5p_gpio_bank k0;
struct s5p_gpio_bank k1;
struct s5p_gpio_bank k2;
struct s5p_gpio_bank k3;
struct s5p_gpio_bank l0;
struct s5p_gpio_bank l1;
struct s5p_gpio_bank l2;
struct s5p_gpio_bank l3;
struct s5p_gpio_bank l4;
struct s5p_gpio_bank h0;
struct s5p_gpio_bank h1;
struct s5p_gpio_bank h2;
struct s5p_gpio_bank h3;
};
struct s5pc110_gpio {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
struct s5p_gpio_bank b;
struct s5p_gpio_bank c0;
struct s5p_gpio_bank c1;
struct s5p_gpio_bank d0;
struct s5p_gpio_bank d1;
struct s5p_gpio_bank e0;
struct s5p_gpio_bank e1;
struct s5p_gpio_bank f0;
struct s5p_gpio_bank f1;
struct s5p_gpio_bank f2;
struct s5p_gpio_bank f3;
struct s5p_gpio_bank g0;
struct s5p_gpio_bank g1;
struct s5p_gpio_bank g2;
struct s5p_gpio_bank g3;
struct s5p_gpio_bank i;
struct s5p_gpio_bank j0;
struct s5p_gpio_bank j1;
struct s5p_gpio_bank j2;
struct s5p_gpio_bank j3;
struct s5p_gpio_bank j4;
struct s5p_gpio_bank mp0_1;
struct s5p_gpio_bank mp0_2;
struct s5p_gpio_bank mp0_3;
struct s5p_gpio_bank mp0_4;
struct s5p_gpio_bank mp0_5;
struct s5p_gpio_bank mp0_6;
struct s5p_gpio_bank mp0_7;
struct s5p_gpio_bank mp1_0;
struct s5p_gpio_bank mp1_1;
struct s5p_gpio_bank mp1_2;
struct s5p_gpio_bank mp1_3;
struct s5p_gpio_bank mp1_4;
struct s5p_gpio_bank mp1_5;
struct s5p_gpio_bank mp1_6;
struct s5p_gpio_bank mp1_7;
struct s5p_gpio_bank mp1_8;
struct s5p_gpio_bank mp2_0;
struct s5p_gpio_bank mp2_1;
struct s5p_gpio_bank mp2_2;
struct s5p_gpio_bank mp2_3;
struct s5p_gpio_bank mp2_4;
struct s5p_gpio_bank mp2_5;
struct s5p_gpio_bank mp2_6;
struct s5p_gpio_bank mp2_7;
struct s5p_gpio_bank mp2_8;
struct s5p_gpio_bank res1[48];
struct s5p_gpio_bank h0;
struct s5p_gpio_bank h1;
struct s5p_gpio_bank h2;
struct s5p_gpio_bank h3;
};
/* functions */
void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
/* GPIO pins per bank */
#define GPIO_PER_BANK 8
static inline unsigned int s5p_gpio_base(int nr)
{
return S5PC110_GPIO_BASE;
}
#define s5pc110_gpio_get_nr(bank, pin) \
((((((unsigned int)&(((struct s5pc110_gpio *)S5PC110_GPIO_BASE)->bank))\
- S5PC110_GPIO_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin)
#endif
/* Pin configurations */
#define GPIO_INPUT 0x0
#define GPIO_OUTPUT 0x1
#define GPIO_IRQ 0xf
#define GPIO_FUNC(x) (x)
/* Pull mode */
#define GPIO_PULL_NONE 0x0
#define GPIO_PULL_DOWN 0x1
#define GPIO_PULL_UP 0x2
/* Drive Strength level */
#define GPIO_DRV_1X 0x0
#define GPIO_DRV_3X 0x1
#define GPIO_DRV_2X 0x2
#define GPIO_DRV_4X 0x3
#define GPIO_DRV_FAST 0x0
#define GPIO_DRV_SLOW 0x1
#if 0 #if 0
struct s5p_gpio_bank { struct s5p_gpio_bank {
unsigned int con; unsigned int con;
@ -50,8 +196,6 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
/* GPIO pins per bank */ /* GPIO pins per bank */
#define GPIO_PER_BANK 8 #define GPIO_PER_BANK 8
#endif
/* Pin configurations */ /* Pin configurations */
#define EXYNOS_GPIO_INPUT 0x0 #define EXYNOS_GPIO_INPUT 0x0
#define EXYNOS_GPIO_OUTPUT 0x1 #define EXYNOS_GPIO_OUTPUT 0x1

2
src/cpu/samsung/s5p-common/s3c24x0_i2c.c → src/cpu/samsung/exynos5-common/i2c.c
View File

@ -37,7 +37,7 @@
//#include <fdtdec.h> //#include <fdtdec.h>
#include "device/i2c.h" #include "device/i2c.h"
#include "s3c24x0_i2c.h" #include "i2c.h"
#define I2C_WRITE 0 #define I2C_WRITE 0
#define I2C_READ 1 #define I2C_READ 1

0
src/cpu/samsung/s5p-common/s3c24x0_i2c.h → src/cpu/samsung/exynos5-common/i2c.h
View File

0
src/cpu/samsung/s5p-common/power.h → src/cpu/samsung/exynos5-common/power.h
View File

8
src/cpu/samsung/s5p-common/pwm.c → src/cpu/samsung/exynos5-common/pwm.c
View File

@ -23,17 +23,11 @@
*/ */
#include <common.h> #include <common.h>
//#include <pwm.h>
#include <arch/io.h> #include <arch/io.h>
//#include <arch/pwm.h>
//#include <arch/clk.h>
/* FIXME(dhendrix): this is a godawful mess of similar-but-different includes... */
#include <cpu/samsung/exynos5-common/clk.h> #include <cpu/samsung/exynos5-common/clk.h>
#include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/cpu.h>
#include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/periph.h>
#include <cpu/samsung/s5p-common/pwm.h> #include <cpu/samsung/exynos5-common/pwm.h>
#include <cpu/samsung/s5p-common/clk.h>
//#include <arch/periph.h>
int pwm_enable(int pwm_id) int pwm_enable(int pwm_id)
{ {

6
src/cpu/samsung/exynos5-common/pwm.h
View File

@ -63,6 +63,12 @@ struct s5p_timer {
unsigned int tcnto4; unsigned int tcnto4;
unsigned int tintcstat; unsigned int tintcstat;
}; };
int pwm_config(int pwm_id, int duty_ns, int period_ns);
int pwm_check_enabled(int pwm_id);
void pwm_disable(int pwm_id);
int pwm_enable(int pwm_id);
int pwm_init(int pwm_id, int div, int invert);
#endif /* __ASSEMBLER__ */ #endif /* __ASSEMBLER__ */
#endif #endif

0
src/cpu/samsung/s5p-common/sromc.c → src/cpu/samsung/exynos5-common/sromc.c
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6
src/cpu/samsung/s5p-common/timer.c → src/cpu/samsung/exynos5-common/timer.c
View File

@ -25,10 +25,8 @@
#include <common.h> #include <common.h>
#include <arch/io.h> #include <arch/io.h>
//#include <cpu/samsung/exynos5250/pwm.h> #include <cpu/samsung/exynos5-common/pwm.h>
//#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5-common/clk.h>
#include <cpu/samsung/s5p-common/pwm.h>
#include <cpu/samsung/s5p-common/clk.h>
#include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/cpu.h>
#include <cpu/samsung/exynos5-common/exynos5-common.h> #include <cpu/samsung/exynos5-common/exynos5-common.h>

0
src/cpu/samsung/s5p-common/watchdog.h → src/cpu/samsung/exynos5-common/watchdog.h
View File

0
src/cpu/samsung/s5p-common/wdt.c → src/cpu/samsung/exynos5-common/wdt.c
View File

2
src/cpu/samsung/exynos5250/Makefile.inc
View File

@ -12,7 +12,7 @@ bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
romstage-y += clock.c romstage-y += clock.c
romstage-y += clock_init.c romstage-y += clock_init.c
romstage-y += pinmux.c # required by s3c24x0_i2c (s5p-common) and uart. romstage-y += pinmux.c # required by s3c24x0_i2c (exynos5-common) and uart.
romstage-y += exynos_cache.c romstage-y += exynos_cache.c
romstage-y += dmc_common.c romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c romstage-y += dmc_init_ddr3.c

2
src/cpu/samsung/exynos5250/clock.c
View File

@ -29,7 +29,7 @@
#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/clk.h>
#include <cpu/samsung/exynos5250/clock_init.h> #include <cpu/samsung/exynos5250/clock_init.h>
#include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/cpu.h>
#include <cpu/samsung/s5p-common/clk.h> #include <cpu/samsung/exynos5-common/clk.h>
/* input clock of PLL: SMDK5250 has 24MHz input clock */ /* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_CLK_FREQ 24000000

2
src/cpu/samsung/exynos5250/clock_init.c
View File

@ -35,7 +35,7 @@
#include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/cpu.h>
#include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/dmc.h>
#include <cpu/samsung/exynos5250/s5p-dp.h> #include <cpu/samsung/exynos5250/s5p-dp.h>
#include <cpu/samsung/s5p-common/clk.h> #include <cpu/samsung/exynos5-common/clk.h>
#include "setup.h" #include "setup.h"

2
src/cpu/samsung/exynos5250/dmc_init_ddr3.c
View File

@ -27,7 +27,7 @@
#include <console/console.h> #include <console/console.h>
//#include "clock.h" //#include "clock.h"
/* FIXME(dhendrix): untangle clock/clk ... */ /* FIXME(dhendrix): untangle clock/clk ... */
#include <cpu/samsung/s5p-common/clock.h> #include <cpu/samsung/exynos5-common/clock.h>
#include <system.h> #include <system.h>
#include "clk.h" #include "clk.h"
#include "cpu.h" #include "cpu.h"

2
src/cpu/samsung/exynos5250/power.c
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@ -33,7 +33,7 @@
#include <drivers/maxim/max77686/max77686.h> #include <drivers/maxim/max77686/max77686.h>
#include "device/i2c.h" #include "device/i2c.h"
#include "cpu/samsung/s5p-common/s3c24x0_i2c.h" #include "cpu/samsung/exynos5-common/i2c.h"
static void ps_hold_setup(void) static void ps_hold_setup(void)
{ {

17
src/cpu/samsung/s5p-common/Makefile.inc
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@ -1,17 +0,0 @@
bootblock-y += s5p_gpio.c
bootblock-$(CONFIG_EARLY_CONSOLE) += pwm.c
bootblock-$(CONFIG_EARLY_CONSOLE) += timer.c
romstage-y += pwm.c # needed by timer.c
romstage-y += s5p_gpio.c
romstage-y += timer.c
romstage-y += s3c24x0_i2c.c
#romstage-y += sromc.c
#romstage-y += wdt.c
ramstage-y += cpu_info.c
ramstage-y += pwm.c # needed by timer.c
ramstage-y += timer.c
ramstage-y += s5p_gpio.c
ramstage-y += s3c24x0_i2c.c

38
src/cpu/samsung/s5p-common/clk.h
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@ -1,38 +0,0 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __S5P_COMMON_CLK_H_
#define __S5P_COMMON_CLK_H_
#define APLL 0
#define MPLL 1
#define EPLL 2
#define HPLL 3
#define VPLL 4
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div);
#endif

116
src/cpu/samsung/s5p-common/cpu.h
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@ -1,116 +0,0 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef _S5PC1XX_CPU_H
#define _S5PC1XX_CPU_H
#define S5PC1XX_ADDR_BASE 0xE0000000
/* S5PC100 */
#define S5PC100_PRO_ID 0xE0000000
#define S5PC100_CLOCK_BASE 0xE0100000
#define S5PC100_GPIO_BASE 0xE0300000
#define S5PC100_VIC0_BASE 0xE4000000
#define S5PC100_VIC1_BASE 0xE4100000
#define S5PC100_VIC2_BASE 0xE4200000
#define S5PC100_DMC_BASE 0xE6000000
#define S5PC100_SROMC_BASE 0xE7000000
#define S5PC100_ONENAND_BASE 0xE7100000
#define S5PC100_PWMTIMER_BASE 0xEA000000
#define S5PC100_WATCHDOG_BASE 0xEA200000
#define S5PC100_UART_BASE 0xEC000000
#define S5PC100_MMC_BASE 0xED800000
/* S5PC110 */
#define S5PC110_PRO_ID 0xE0000000
#define S5PC110_CLOCK_BASE 0xE0100000
#define S5PC110_GPIO_BASE 0xE0200000
#define S5PC110_PWMTIMER_BASE 0xE2500000
#define S5PC110_WATCHDOG_BASE 0xE2700000
#define S5PC110_UART_BASE 0xE2900000
#define S5PC110_SROMC_BASE 0xE8000000
#define S5PC110_MMC_BASE 0xEB000000
#define S5PC110_DMC0_BASE 0xF0000000
#define S5PC110_DMC1_BASE 0xF1400000
#define S5PC110_VIC0_BASE 0xF2000000
#define S5PC110_VIC1_BASE 0xF2100000
#define S5PC110_VIC2_BASE 0xF2200000
#define S5PC110_VIC3_BASE 0xF2300000
#define S5PC110_OTG_BASE 0xEC000000
#define S5PC110_PHY_BASE 0xEC100000
#define S5PC110_USB_PHY_CONTROL 0xE010E80C
#include <arch/io.h>
/* CPU detection macros */
extern unsigned int s5p_cpu_id;
/* FIXME(dhendrix): conflicts with the one in cpu_info.c ... */
#if 0
inline void s5p_set_cpu_id(void)
{
s5p_cpu_id = readl(S5PC100_PRO_ID);
s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12);
}
#endif
inline void s5p_set_cpu_id(void);
#define IS_SAMSUNG_TYPE(type, id) \
static inline int cpu_is_##type(void) \
{ \
return s5p_cpu_id == id ? 1 : 0; \
}
IS_SAMSUNG_TYPE(s5pc100, 0xc100)
IS_SAMSUNG_TYPE(s5pc110, 0xc110)
/*
* FIXME(dhendrix): collides with SAMSUNG_BASE in exynos header files. We
* don't really care about old S5P processors right now.
*/
#if 0
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
if (cpu_is_s5pc100()) \
return S5PC100_##base; \
else if (cpu_is_s5pc110()) \
return S5PC110_##base; \
else \
return 0; \
}
SAMSUNG_BASE(clock, CLOCK_BASE)
SAMSUNG_BASE(gpio, GPIO_BASE)
SAMSUNG_BASE(pro_id, PRO_ID)
SAMSUNG_BASE(mmc, MMC_BASE)
SAMSUNG_BASE(sromc, SROMC_BASE)
SAMSUNG_BASE(timer, PWMTIMER_BASE)
SAMSUNG_BASE(uart, UART_BASE)
SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
#endif
int s5p_get_cpu_rev(void);
//void s5p_set_cpu_id(void);
int s5p_get_cpu_id(void);
#endif /* _S5PC1XX_CPU_H */

173
src/cpu/samsung/s5p-common/gpio.h
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@ -1,173 +0,0 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef S5P_GPIO_H_
#define S5P_GPIO_H_
#include <cpu/samsung/s5p-common/cpu.h> /* FIXME: for S5PC110_GPIO_BASE */
#ifndef __ASSEMBLER__
struct s5p_gpio_bank {
unsigned int con;
unsigned int dat;
unsigned int pull;
unsigned int drv;
unsigned int pdn_con;
unsigned int pdn_pull;
unsigned char res1[8];
};
struct s5pc100_gpio {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
struct s5p_gpio_bank b;
struct s5p_gpio_bank c;
struct s5p_gpio_bank d;
struct s5p_gpio_bank e0;
struct s5p_gpio_bank e1;
struct s5p_gpio_bank f0;
struct s5p_gpio_bank f1;
struct s5p_gpio_bank f2;
struct s5p_gpio_bank f3;
struct s5p_gpio_bank g0;
struct s5p_gpio_bank g1;
struct s5p_gpio_bank g2;
struct s5p_gpio_bank g3;
struct s5p_gpio_bank i;
struct s5p_gpio_bank j0;
struct s5p_gpio_bank j1;
struct s5p_gpio_bank j2;
struct s5p_gpio_bank j3;
struct s5p_gpio_bank j4;
struct s5p_gpio_bank k0;
struct s5p_gpio_bank k1;
struct s5p_gpio_bank k2;
struct s5p_gpio_bank k3;
struct s5p_gpio_bank l0;
struct s5p_gpio_bank l1;
struct s5p_gpio_bank l2;
struct s5p_gpio_bank l3;
struct s5p_gpio_bank l4;
struct s5p_gpio_bank h0;
struct s5p_gpio_bank h1;
struct s5p_gpio_bank h2;
struct s5p_gpio_bank h3;
};
struct s5pc110_gpio {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
struct s5p_gpio_bank b;
struct s5p_gpio_bank c0;
struct s5p_gpio_bank c1;
struct s5p_gpio_bank d0;
struct s5p_gpio_bank d1;
struct s5p_gpio_bank e0;
struct s5p_gpio_bank e1;
struct s5p_gpio_bank f0;
struct s5p_gpio_bank f1;
struct s5p_gpio_bank f2;
struct s5p_gpio_bank f3;
struct s5p_gpio_bank g0;
struct s5p_gpio_bank g1;
struct s5p_gpio_bank g2;
struct s5p_gpio_bank g3;
struct s5p_gpio_bank i;
struct s5p_gpio_bank j0;
struct s5p_gpio_bank j1;
struct s5p_gpio_bank j2;
struct s5p_gpio_bank j3;
struct s5p_gpio_bank j4;
struct s5p_gpio_bank mp0_1;
struct s5p_gpio_bank mp0_2;
struct s5p_gpio_bank mp0_3;
struct s5p_gpio_bank mp0_4;
struct s5p_gpio_bank mp0_5;
struct s5p_gpio_bank mp0_6;
struct s5p_gpio_bank mp0_7;
struct s5p_gpio_bank mp1_0;
struct s5p_gpio_bank mp1_1;
struct s5p_gpio_bank mp1_2;
struct s5p_gpio_bank mp1_3;
struct s5p_gpio_bank mp1_4;
struct s5p_gpio_bank mp1_5;
struct s5p_gpio_bank mp1_6;
struct s5p_gpio_bank mp1_7;
struct s5p_gpio_bank mp1_8;
struct s5p_gpio_bank mp2_0;
struct s5p_gpio_bank mp2_1;
struct s5p_gpio_bank mp2_2;
struct s5p_gpio_bank mp2_3;
struct s5p_gpio_bank mp2_4;
struct s5p_gpio_bank mp2_5;
struct s5p_gpio_bank mp2_6;
struct s5p_gpio_bank mp2_7;
struct s5p_gpio_bank mp2_8;
struct s5p_gpio_bank res1[48];
struct s5p_gpio_bank h0;
struct s5p_gpio_bank h1;
struct s5p_gpio_bank h2;
struct s5p_gpio_bank h3;
};
/* functions */
void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
/* GPIO pins per bank */
#define GPIO_PER_BANK 8
static inline unsigned int s5p_gpio_base(int nr)
{
return S5PC110_GPIO_BASE;
}
#define s5pc110_gpio_get_nr(bank, pin) \
((((((unsigned int)&(((struct s5pc110_gpio *)S5PC110_GPIO_BASE)->bank))\
- S5PC110_GPIO_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin)
#endif
/* Pin configurations */
#define GPIO_INPUT 0x0
#define GPIO_OUTPUT 0x1
#define GPIO_IRQ 0xf
#define GPIO_FUNC(x) (x)
/* Pull mode */
#define GPIO_PULL_NONE 0x0
#define GPIO_PULL_DOWN 0x1
#define GPIO_PULL_UP 0x2
/* Drive Strength level */
#define GPIO_DRV_1X 0x0
#define GPIO_DRV_3X 0x1
#define GPIO_DRV_2X 0x2
#define GPIO_DRV_4X 0x3
#define GPIO_DRV_FAST 0x0
#define GPIO_DRV_SLOW 0x1
#endif /* S5P_GPIO_H_ */

75
src/cpu/samsung/s5p-common/pwm.h
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@ -1,75 +0,0 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __S5P_COMMON_PWM_H_
#define __S5P_COMMON_PWM_H_
#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
/* Divider MUX */
#define MUX_DIV_1 0 /* 1/1 period */
#define MUX_DIV_2 1 /* 1/2 period */
#define MUX_DIV_4 2 /* 1/4 period */
#define MUX_DIV_8 3 /* 1/8 period */
#define MUX_DIV_16 4 /* 1/16 period */
#define MUX_DIV_SHIFT(x) (x * 4)
#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
#define TCON_START(x) (1 << TCON_OFFSET(x))
#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
#define TCON4_AUTO_RELOAD (1 << 22)
#ifndef __ASSEMBLER__
struct s5p_timer {
unsigned int tcfg0;
unsigned int tcfg1;
unsigned int tcon;
unsigned int tcntb0;
unsigned int tcmpb0;
unsigned int tcnto0;
unsigned int tcntb1;
unsigned int tcmpb1;
unsigned int tcnto1;
unsigned int tcntb2;
unsigned int tcmpb2;
unsigned int tcnto2;
unsigned int tcntb3;
unsigned int res1;
unsigned int tcnto3;
unsigned int tcntb4;
unsigned int tcnto4;
unsigned int tintcstat;
};
#endif /* __ASSEMBLER__ */
/* FIXME(dhendrix): added missing prototypes... */
int pwm_config(int pwm_id, int duty_ns, int period_ns);
int pwm_check_enabled(int pwm_id);
void pwm_disable(int pwm_id);
int pwm_enable(int pwm_id);
int pwm_init(int pwm_id, int div, int invert);
#endif /* __S5P_COMMON_PWM_H_ */

53
src/cpu/samsung/s5p-common/sromc.h
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@ -1,53 +0,0 @@
/*
* (C) Copyright 2010 Samsung Electronics
* Naveen Krishna Ch <ch.naveen@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Note: This file contains the register description for Memory subsystem
* (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
*
* Only SROMC is defined as of now
*/
#ifndef __ASM_ARCH_SROMC_H_
#define __ASM_ARCH_SROMC_H_
#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0))
#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
/* 1-> Byte base address*/
#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2))
#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3))
#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */
#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */
#define SMC_BC_TACC(x) (x << 16) /* 14clk access cycle */
#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */
#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */
#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */
#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
#ifndef __ASSEMBLER__
struct s5p_sromc {
unsigned int bw;
unsigned int bc[6];
};
#endif /* __ASSEMBLER__ */
/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
#endif /* __ASM_ARCH_SMC_H_ */

58
src/cpu/samsung/s5p-common/uart.h
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@ -1,58 +0,0 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARCH_UART_H_
#define __ASM_ARCH_UART_H_
#ifndef __ASSEMBLER__
/* baudrate rest value */
union br_rest {
unsigned short slot; /* udivslot */
unsigned char value; /* ufracval */
};
struct s5p_uart {
unsigned int ulcon;
unsigned int ucon;
unsigned int ufcon;
unsigned int umcon;
unsigned int utrstat;
unsigned int uerstat;
unsigned int ufstat;
unsigned int umstat;
unsigned char utxh;
unsigned char res1[3];
unsigned char urxh;
unsigned char res2[3];
unsigned int ubrdiv;
union br_rest rest;
unsigned char res3[0x3d0];
};
static inline int s5p_uart_divslot(void)
{
return 1;
}
#endif /* __ASSEMBLER__ */
#endif