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vendorcode/amd/agesa: Fix tautological compare 

An unsigned enum expression is always strictly positive;
Comparison with '>= 0' is a tautology, hence remove it.

Change-Id: I910d672f8a27d278c2a2fe1e4f39fc61f2c5dbc5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/8207
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Edward O'Callaghan 2015-01-14 00:41:44 +11:00 committed by Martin Roth
parent 91d94b0907
commit 5de5522685
21 changed files with 21 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
View File

@ -169,7 +169,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
View File

@ -153,7 +153,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
View File

@ -156,7 +156,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
View File

@ -169,7 +169,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
View File

@ -172,7 +172,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
View File

@ -157,7 +157,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
View File

@ -158,7 +158,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
View File

@ -173,7 +173,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
View File

@ -159,7 +159,7 @@ MemNCmnGetSetFieldLN (
if (FieldName == BFDctAccessDone) {
// Llano does not support DctAccessDone. Assume DctAccessDone=1 always.
Value = 1;
} else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
} else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
View File

@ -174,7 +174,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
View File

@ -159,7 +159,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
View File

@ -160,7 +160,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
View File

@ -175,7 +175,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
View File

@ -293,7 +293,7 @@ MemRecNCmnGetSetFieldON (
UINT8 Instance;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
View File

@ -173,7 +173,7 @@ MemNCmnGetSetFieldC32 (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
View File

@ -158,7 +158,7 @@ MemNCmnGetSetFieldDA (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
View File

@ -159,7 +159,7 @@ MemNCmnGetSetFieldDr (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
View File

@ -174,7 +174,7 @@ MemNCmnGetSetFieldHy (
UINT32 Mask;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
View File

@ -182,7 +182,7 @@ MemNCmnGetSetFieldOr (
UINT8 Instance;
Value = 0;
if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
View File

@ -170,7 +170,7 @@ MemNCmnGetSetFieldTN (
if (FieldName == BFDctAccessDone) {
// No need to poll DctAccessDone for TN due to enhancement in phy
Value = 1;
} else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
} else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);

2
src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
View File

@ -169,7 +169,7 @@ MemNCmnGetSetFieldKB (
if (FieldName == BFDctAccessDone) {
// No need to poll DctAccessDone for KB due to enhancement in phy
Value = 1;
} else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
} else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);