Intel and GFXUMA: drop redundant use of lb_add_memory_range()
Use of uma_resource() in northbridge code created a memory resource marked as reserved. Such resources are removed from system memory in write_coreboot_table(). Change-Id: I14bfd560140d8d30ec156562f23072bfae747bde Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1238 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -3,7 +3,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -22,7 +22,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -44,7 +44,7 @@ void mainboard_suspend_resume(void)
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) && CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -23,7 +23,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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struct chip_operations mainboard_ops = {
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@ -24,7 +24,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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static void mainboard_init(device_t dev)
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@ -51,7 +51,7 @@ void mainboard_suspend_resume(void)
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) && CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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@ -44,7 +44,7 @@ void mainboard_suspend_resume(void)
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) && CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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@ -30,7 +30,7 @@
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int add_mainboard_resources(struct lb_memory *mem)
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{
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return add_northbridge_resources(mem);
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return 0;
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}
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// setting the bit disables the led.
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@ -62,15 +62,6 @@ static const struct pci_driver i810e_northbridge_driver __pci_driver = {
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.device = 0x7124,
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};
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int add_northbridge_resources(struct lb_memory *mem)
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{
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printk(BIOS_DEBUG, "Adding IGD UMA memory area\n");
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_base, uma_memory_size);
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return 0;
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}
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/* Table which returns the RAM size in MB when fed the DRP[7:4] or [3:0] value.
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* Note that 2 is a value which the DRP should never be programmed to.
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* Some size values appear twice, due to single-sided vs dual-sided banks.
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@ -52,15 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
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.device = 0x3575,
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};
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int add_northbridge_resources(struct lb_memory *mem)
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{
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printk(BIOS_DEBUG, "Adding IGD UMA memory area\n");
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_base, uma_memory_size);
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return 0;
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}
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#if CONFIG_WRITE_HIGH_TABLES
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#include <cbmem.h>
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#endif
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@ -61,11 +61,6 @@ int bridge_silicon_revision(void)
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static const int legacy_hole_base_k = 0xa0000 / 1024;
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static const int legacy_hole_size_k = 384;
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int add_northbridge_resources(struct lb_memory *mem)
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{
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return 0;
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}
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void cbmem_post_handling(void)
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{
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update_mrc_cache();
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