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kontron/mal10: Set up GPIOs in CPLD/EC 

The COMe module connector implements 8 GPIO lines from the CPLD/EC pins.
Use the Kempld GPIO driver[1] to configure these pins in accordance with
the COM Express Module Base Specification [2].

TEST = Set different logic states for the pin configured as outputs and
check them with an oscilloscope.

[1] CB:47595 , Change-Id: Id767aa451fbf2ca1c0dccfc9aa2c024c6f37c1bb
[2] page 79-81, PICMG (R) COM.0 Revision 3.0 COM Express (R) Base
    Specification - March 31, 2017.

Change-Id: I7d354aa32ac8c64f54b2bcbdb4f1b8915f55264e
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54380
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2021-05-16 17:43:00 +03:00 committed by Felix Held
parent 8e1a767c9c
commit 5e3854ae7b
1 changed files with 11 additions and 0 deletions
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11
src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
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@ -74,6 +74,17 @@ chip soc/intel/apollolake
device generic 1.0 on # I2C
register "i2c_frequency" = "KEMPLD_I2C_FREQ_FAST_MODE_400KHZ"
end
device gpio 0 on # GPIO
# The connector implements 8 GPIO lines only
register "gpio[0]" = "KEMPLD_GPIO_INPUT"
register "gpio[1]" = "KEMPLD_GPIO_INPUT"
register "gpio[2]" = "KEMPLD_GPIO_INPUT"
register "gpio[3]" = "KEMPLD_GPIO_INPUT"
register "gpio[4]" = "KEMPLD_GPIO_OUTPUT_LOW"
register "gpio[5]" = "KEMPLD_GPIO_OUTPUT_LOW"
register "gpio[6]" = "KEMPLD_GPIO_OUTPUT_LOW"
register "gpio[7]" = "KEMPLD_GPIO_OUTPUT_LOW"
end
end
end # LPC
device pci 1f.1 on # SMBUS