diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 79b366f885..7df9106f2f 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -152,7 +152,7 @@ static void gma_func0_init(struct device *dev)
 	intel_gma_init_igd_opregion();
 
 	gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0);
-	if (gtt_res == NULL)
+	if (!gtt_res)
 		return;
 	mmio = res2mmio(gtt_res, 0, 0);
 
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index f41adf32be..1078748de6 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -174,7 +174,7 @@ void northbridge_write_smram(u8 smram)
 {
 	struct device *dev = pcidev_on_root(0, 0);
 
-	if (dev == NULL)
+	if (!dev)
 		die("could not find pci 00:00.0!\n");
 
 	pci_write_config8(dev, D0F0_SMRAM, smram);
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 5524b315c5..12debb2b32 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -116,7 +116,7 @@ void northbridge_write_smram(u8 smram)
 {
 	struct device *dev = pcidev_on_root(0, 0);
 
-	if (dev == NULL)
+	if (!dev)
 		die("could not find pci 00:00.0!\n");
 
 	pci_write_config8(dev, SMRAM, smram);
diff --git a/src/northbridge/intel/ironlake/gma.c b/src/northbridge/intel/ironlake/gma.c
index c816ba6b57..8084560636 100644
--- a/src/northbridge/intel/ironlake/gma.c
+++ b/src/northbridge/intel/ironlake/gma.c
@@ -172,7 +172,7 @@ static void gma_read_resources(struct device *dev)
 
 	/* Set the graphics memory to write combining. */
 	res = probe_resource(dev, PCI_BASE_ADDRESS_2);
-	if (res == NULL) {
+	if (!res) {
 		printk(BIOS_DEBUG, "gma: memory resource not found.\n");
 		return;
 	}
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index 1f550835b0..634ba90bb6 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -3207,7 +3207,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
 	}
 
 	if (s3resume) {
-		if (info.cached_training == NULL) {
+		if (!info.cached_training) {
 			u32 reg32;
 			printk(BIOS_ERR,
 			       "Couldn't find training data. Rebooting\n");
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 6772432329..3afdd3ba98 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -118,7 +118,7 @@ void northbridge_write_smram(u8 smram)
 {
 	struct device *dev = pcidev_on_root(0, 0);
 
-	if (dev == NULL)
+	if (!dev)
 		die("could not find pci 00:00.0!\n");
 
 	pci_write_config8(dev, SMRAM, smram);
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 9082f8a7d3..5044512ead 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -107,7 +107,7 @@ static void setup_sdram_meminfo(ramctr_timing *ctrl)
 
 	/* The 'spd_add_smbios17' function allocates this CBMEM area */
 	struct memory_info *m = cbmem_find(CBMEM_ID_MEMINFO);
-	if (m == NULL)
+	if (!m)
 		return;
 
 	const uint32_t capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index c276d4c609..a308d07305 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -111,7 +111,7 @@ static void prepare_mrc_cache(struct pei_data *pei_data)
 	pei_data->mrc_input = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
 							  MRC_CACHE_VERSION,
 							  &mrc_size);
-	if (pei_data->mrc_input == NULL) {
+	if (!pei_data->mrc_input) {
 		/* Error message printed in find_current_mrc_cache */
 		return;
 	}
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 015e0ac658..cdf43c95e6 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -138,7 +138,7 @@ void northbridge_write_smram(u8 smram)
 {
 	struct device *dev = pcidev_on_root(0, 0);
 
-	if (dev == NULL)
+	if (!dev)
 		die("could not find pci 00:00.0!\n");
 
 	pci_write_config8(dev, D0F0_SMRAM, smram);