sb/intel/common: Change some local SMBus function signatures
Change-Id: I82be883e08ca58fa454b4ad73d20dde2d40a8e3b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38220 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki
parent
bd65985a63
commit
5e9ae0c2bc
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@ -72,17 +72,17 @@ static void smbus_delay(void)
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inb(0x80);
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}
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static void host_outb(unsigned int base, u8 reg, u8 value)
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static void host_outb(uintptr_t base, u8 reg, u8 value)
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{
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outb(value, base + reg);
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}
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static u8 host_inb(unsigned int base, u8 reg)
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static u8 host_inb(uintptr_t base, u8 reg)
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{
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return inb(base + reg);
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}
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static void host_and_or(unsigned int base, u8 reg, u8 mask, u8 or)
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static void host_and_or(uintptr_t base, u8 reg, u8 mask, u8 or)
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{
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u8 value;
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value = host_inb(base, reg);
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@ -102,7 +102,7 @@ static int host_completed(u8 status)
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return status != 0;
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}
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static int recover_master(int smbus_base, int ret)
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static int recover_master(uintptr_t base, int ret)
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{
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/* TODO: Depending of the failure, drive KILL transaction
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* or force soft reset on SMBus master controller.
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@ -123,40 +123,39 @@ static int cb_err_from_stat(u8 status)
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return SMBUS_ERROR;
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}
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static int setup_command(unsigned int smbus_base, u8 ctrl, u8 xmitadd)
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static int setup_command(uintptr_t base, u8 ctrl, u8 xmitadd)
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{
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unsigned int loops = SMBUS_TIMEOUT;
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u8 host_busy;
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do {
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smbus_delay();
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host_busy = host_inb(smbus_base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY;
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host_busy = host_inb(base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY;
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} while (--loops && host_busy);
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if (loops == 0)
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return recover_master(smbus_base,
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SMBUS_WAIT_UNTIL_READY_TIMEOUT);
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return recover_master(base, SMBUS_WAIT_UNTIL_READY_TIMEOUT);
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/* Clear any lingering errors, so the transaction will run. */
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host_and_or(smbus_base, SMBHSTSTAT, 0xff, 0);
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host_and_or(base, SMBHSTSTAT, 0xff, 0);
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/* Set up transaction */
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/* Disable interrupts */
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host_outb(smbus_base, SMBHSTCTL, ctrl);
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host_outb(base, SMBHSTCTL, ctrl);
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/* Set the device I'm talking to. */
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host_outb(smbus_base, SMBXMITADD, xmitadd);
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host_outb(base, SMBXMITADD, xmitadd);
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return 0;
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}
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static int execute_command(unsigned int smbus_base)
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static int execute_command(uintptr_t base)
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{
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unsigned int loops = SMBUS_TIMEOUT;
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u8 status;
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/* Start the command. */
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host_and_or(smbus_base, SMBHSTCTL, 0xff, SMBHSTCNT_START);
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host_and_or(base, SMBHSTCTL, 0xff, SMBHSTCNT_START);
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/* Poll for it to start. */
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do {
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@ -165,103 +164,101 @@ static int execute_command(unsigned int smbus_base)
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/* If we poll too slow, we could miss HOST_BUSY flag
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* set and detect INTR or x_ERR flags instead here.
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*/
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status = host_inb(smbus_base, SMBHSTSTAT);
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status = host_inb(base, SMBHSTSTAT);
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status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS);
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} while (--loops && status == 0);
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if (loops == 0)
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return recover_master(smbus_base,
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return recover_master(base,
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SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT);
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return 0;
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}
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static int complete_command(unsigned int smbus_base)
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static int complete_command(uintptr_t base)
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{
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unsigned int loops = SMBUS_TIMEOUT;
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u8 status;
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do {
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smbus_delay();
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status = host_inb(smbus_base, SMBHSTSTAT);
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status = host_inb(base, SMBHSTSTAT);
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} while (--loops && !host_completed(status));
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if (loops == 0)
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return recover_master(smbus_base,
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return recover_master(base,
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SMBUS_WAIT_UNTIL_DONE_TIMEOUT);
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return cb_err_from_stat(status);
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}
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static int smbus_read_cmd(unsigned int smbus_base, u8 ctrl, u8 device,
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unsigned int address)
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static int smbus_read_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address)
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{
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int ret;
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u16 word;
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/* Set up for a byte data read. */
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ret = setup_command(smbus_base, ctrl, XMIT_READ(device));
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ret = setup_command(base, ctrl, XMIT_READ(device));
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if (ret < 0)
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return ret;
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/* Set the command/address... */
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host_outb(smbus_base, SMBHSTCMD, address);
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host_outb(base, SMBHSTCMD, address);
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/* Clear the data bytes... */
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host_outb(smbus_base, SMBHSTDAT0, 0);
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host_outb(smbus_base, SMBHSTDAT1, 0);
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host_outb(base, SMBHSTDAT0, 0);
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host_outb(base, SMBHSTDAT1, 0);
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/* Start the command */
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ret = execute_command(smbus_base);
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ret = execute_command(base);
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if (ret < 0)
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return ret;
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/* Poll for transaction completion */
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ret = complete_command(smbus_base);
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ret = complete_command(base);
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if (ret < 0)
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return ret;
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/* Read results of transaction */
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word = host_inb(smbus_base, SMBHSTDAT0);
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word = host_inb(base, SMBHSTDAT0);
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if (ctrl == I801_WORD_DATA)
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word |= host_inb(smbus_base, SMBHSTDAT1) << 8;
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word |= host_inb(base, SMBHSTDAT1) << 8;
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return word;
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}
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static int smbus_write_cmd(unsigned int smbus_base, u8 ctrl, u8 device,
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unsigned int address, unsigned int data)
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static int smbus_write_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address, u16 data)
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{
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int ret;
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/* Set up for a byte data write. */
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ret = setup_command(smbus_base, ctrl, XMIT_WRITE(device));
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ret = setup_command(base, ctrl, XMIT_WRITE(device));
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if (ret < 0)
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return ret;
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/* Set the command/address... */
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host_outb(smbus_base, SMBHSTCMD, address);
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host_outb(base, SMBHSTCMD, address);
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/* Set the data bytes... */
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host_outb(smbus_base, SMBHSTDAT0, data & 0xff);
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host_outb(base, SMBHSTDAT0, data & 0xff);
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if (ctrl == I801_WORD_DATA)
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host_outb(smbus_base, SMBHSTDAT1, data >> 8);
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host_outb(base, SMBHSTDAT1, data >> 8);
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/* Start the command */
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ret = execute_command(smbus_base);
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ret = execute_command(base);
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if (ret < 0)
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return ret;
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/* Poll for transaction completion */
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return complete_command(smbus_base);
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return complete_command(base);
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}
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static int block_cmd_loop(unsigned int smbus_base,
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u8 *buf, const unsigned int max_bytes, int flags)
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static int block_cmd_loop(uintptr_t base, u8 *buf, size_t max_bytes, int flags)
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{
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u8 status;
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unsigned int loops = SMBUS_TIMEOUT;
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int ret, bytes = 0;
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int ret;
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size_t bytes = 0;
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int is_write_cmd = flags & BLOCK_WRITE;
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int sw_drives_nak = flags & BLOCK_I2C;
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@ -274,41 +271,41 @@ static int block_cmd_loop(unsigned int smbus_base,
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* was really updated with the transaction. */
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if (!sw_drives_nak) {
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if (is_write_cmd)
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host_outb(smbus_base, SMBHSTDAT0, max_bytes);
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host_outb(base, SMBHSTDAT0, max_bytes);
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else
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host_outb(smbus_base, SMBHSTDAT0, 0);
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host_outb(base, SMBHSTDAT0, 0);
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}
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/* Send first byte from buffer, bytes_sent increments after
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* hardware acknowledges it.
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*/
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if (is_write_cmd)
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host_outb(smbus_base, SMBBLKDAT, *buf++);
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host_outb(base, SMBBLKDAT, *buf++);
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/* Start the command */
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ret = execute_command(smbus_base);
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ret = execute_command(base);
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if (ret < 0)
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return ret;
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/* Poll for transaction completion */
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do {
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status = host_inb(smbus_base, SMBHSTSTAT);
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status = host_inb(base, SMBHSTSTAT);
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if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */
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if (is_write_cmd) {
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bytes++;
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if (bytes < max_bytes)
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host_outb(smbus_base, SMBBLKDAT, *buf++);
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host_outb(base, SMBBLKDAT, *buf++);
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} else {
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if (bytes < max_bytes)
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*buf++ = host_inb(smbus_base, SMBBLKDAT);
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*buf++ = host_inb(base, SMBBLKDAT);
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bytes++;
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/* Indicate that next byte is the last one. */
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if (sw_drives_nak && (bytes + 1 >= max_bytes)) {
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host_and_or(smbus_base, SMBHSTCTL,
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0xff, SMBHSTCNT_LAST_BYTE);
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host_and_or(base, SMBHSTCTL, 0xff,
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SMBHSTCNT_LAST_BYTE);
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}
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}
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@ -317,17 +314,16 @@ static int block_cmd_loop(unsigned int smbus_base,
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* and clears HOST_BUSY flag once the byte count
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* has been reached or LAST_BYTE was set.
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*/
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host_outb(smbus_base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE);
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host_outb(base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE);
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}
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} while (--loops && !host_completed(status));
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dprintk("%s: status = %02x, len = %d / %d, loops = %d\n",
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dprintk("%s: status = %02x, len = %zd / %zd, loops = %d\n",
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__func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops);
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if (loops == 0)
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return recover_master(smbus_base,
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SMBUS_WAIT_UNTIL_DONE_TIMEOUT);
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return recover_master(base, SMBUS_WAIT_UNTIL_DONE_TIMEOUT);
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ret = cb_err_from_stat(status);
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if (ret < 0)
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