util/intelmetool: Fix lint errors and warnings
Clean the code to fix all errors and warnings. No functional change. Changes: * Fix lines over 80chars * Fix typos * Restructure code to reduce indent level * Move RCBA handling into own files * Introduce helper functions for RCBA access * Move GPL string into header * Fix whitespace in macros Change-Id: Ib8e3617ebb34c47959d6619dfbc7189045e6b8f7 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
This commit is contained in:
Patrick Rudolph
parent
eca98ba460
commit
5e9dc37818
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@ -20,7 +20,7 @@ PREFIX ?= /usr/local
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CFLAGS ?= -O0 -g -Wall -W -Wno-unused-parameter -Wno-sign-compare -Wno-unused-function
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LDFLAGS += -lpci -lz
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OBJS = intelmetool.o me.o me_status.o mmap.o
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OBJS = intelmetool.o me.o me_status.o mmap.o rcba.o
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OS_ARCH = $(shell uname)
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ifeq ($(OS_ARCH), Darwin)
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@ -24,6 +24,7 @@
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#include "me.h"
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#include "mmap.h"
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#include "intelmetool.h"
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#include "rcba.h"
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#define FD2 0x3428
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#define ME_COMMAND_DELAY 10000
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@ -32,8 +33,6 @@ extern int fd_mem;
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int debug = 0;
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static uint32_t fd2 = 0;
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static const int size = 0x4000;
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static volatile uint8_t *rcba;
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static void dumpmem(uint8_t *phys, uint32_t size)
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{
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@ -63,16 +62,6 @@ static void dumpmemfile(uint8_t *phys, uint32_t size)
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fclose(fp);
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}
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static void rehide_me(void)
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{
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if (fd2 & 0x2) {
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printf("Re-hiding MEI device...");
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fd2 = *(uint32_t *)(rcba + FD2);
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*(uint32_t *)(rcba + FD2) = fd2 | 0x2;
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printf("done\n");
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}
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}
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/* You need >4GB total ram, in kernel cmdline, use 'mem=1000m'
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* then this code will clone to absolute memory address 0xe0000000
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* which can be read using a mmap tool at that offset.
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@ -103,7 +92,9 @@ static void dump_me_memory(void)
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printf("done\n\nHere are the first bytes:\n");
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dumpmemfile(dump, 0x2000000);
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//printf("Try reading 0x%zx with other mmap tool...\n"
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// "Press enter to quit, you only get one chance to run this tool before reboot required for some reason\n", me_clone);
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// "Press enter to quit, you only get one chance to run"
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// "this tool before reboot required for some reason\n",
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// me_clone);
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while (getc(stdin) != '\n') {};
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unmap_physical(dump, 0x2000000);
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}
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@ -123,27 +114,36 @@ static int pci_platform_scan(void)
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pci_scan_bus(pacc);
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for (dev=pacc->devices; dev; dev=dev->next) {
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pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
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pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES |
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PCI_FILL_SIZES | PCI_FILL_CLASS);
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name = pci_lookup_name(pacc, namebuf, sizeof(namebuf),
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PCI_LOOKUP_DEVICE, dev->vendor_id, dev->device_id);
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if (name == NULL)
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name = "<unknown>";
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if (dev->vendor_id == PCI_VENDOR_ID_INTEL) {
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if (PCI_DEV_HAS_ME_DISABLE(dev->device_id)) {
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printf(CGRN "Good news, you have a `%s` so ME is present but can be disabled, continuing...\n\n" RESET, name);
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break;
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} else if (PCI_DEV_HAS_ME_DIFFICULT(dev->device_id)) {
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printf(CRED "Bad news, you have a `%s` so you have ME hardware on board and you can't control or disable it, continuing...\n\n" RESET, name);
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break;
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} else if (PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id)) {
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printf(CYEL "Not sure if ME hardware is present because you have a `%s`, but it is possible to disable it if you do, continuing...\n\n" RESET, name);
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break;
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} else if (PCI_DEV_ME_NOT_SURE(dev->device_id)) {
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printf(CYEL "Found `%s`. Not sure whether you have ME hardware, exiting\n\n" RESET, name);
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pci_cleanup(pacc);
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return 1;
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break;
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}
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if (dev->vendor_id != PCI_VENDOR_ID_INTEL)
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continue;
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if (PCI_DEV_HAS_ME_DISABLE(dev->device_id)) {
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printf(CGRN "Good news, you have a `%s` so ME is "
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"present but can be disabled, continuing...\n\n"
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RESET, name);
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break;
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} else if (PCI_DEV_HAS_ME_DIFFICULT(dev->device_id)) {
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printf(CRED "Bad news, you have a `%s` so you have ME "
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"hardware on board and you can't control or "
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"disable it, continuing...\n\n" RESET, name);
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break;
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} else if (PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id)) {
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printf(CYEL "Not sure if ME hardware is present "
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"because you have a `%s`, but it is possible to "
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"disable it if you do, continuing...\n\n" RESET,
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name);
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break;
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} else if (PCI_DEV_ME_NOT_SURE(dev->device_id)) {
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printf(CYEL "Found `%s`. Not sure whether you have ME "
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"hardware, exiting\n\n" RESET, name);
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pci_cleanup(pacc);
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return 1;
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}
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}
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@ -152,7 +152,8 @@ static int pci_platform_scan(void)
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!PCI_DEV_HAS_ME_DIFFICULT(dev->device_id) &&
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!PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id) &&
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!PCI_DEV_ME_NOT_SURE(dev->device_id)) {
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printf(CCYN "ME is not present on your board or unkown\n\n" RESET);
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printf(CCYN "ME is not present on your board or unknown\n\n"
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RESET);
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pci_cleanup(pacc);
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return 1;
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}
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@ -162,6 +163,43 @@ static int pci_platform_scan(void)
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return 0;
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}
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static int activate_me(void)
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{
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if (read_rcba32(FD2, &fd2)) {
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printf("Error reading RCBA\n");
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return 1;
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}
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if (write_rcba32(FD2, fd2 & ~0x2)) {
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printf("Error writing RCBA\n");
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return 1;
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}
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if (debug) {
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if (fd2 & 0x2)
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printf("MEI was hidden on PCI, now unlocked\n");
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else
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printf("MEI not hidden on PCI, checking if visible\n");
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}
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return 0;
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}
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static void rehide_me(void)
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{
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if (fd2 & 0x2) {
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if (debug)
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printf("Re-hiding MEI device...");
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if (read_rcba32(FD2, &fd2)) {
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printf("Error reading RCBA\n");
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return;
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}
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if (write_rcba32(FD2, fd2 | 0x2)) {
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printf("Error writing RCBA\n");
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return;
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}
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if (debug)
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printf("done\n");
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}
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}
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static struct pci_dev *pci_me_interface_scan(const char **name, char *namebuf,
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int namebuf_size)
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{
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@ -176,14 +214,16 @@ static struct pci_dev *pci_me_interface_scan(const char **name, char *namebuf,
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pci_scan_bus(pacc);
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for (dev=pacc->devices; dev; dev=dev->next) {
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pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
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pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES |
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PCI_FILL_SIZES | PCI_FILL_CLASS);
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*name = pci_lookup_name(pacc, namebuf, namebuf_size,
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PCI_LOOKUP_DEVICE, dev->vendor_id, dev->device_id);
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if (dev->vendor_id == PCI_VENDOR_ID_INTEL) {
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if (PCI_DEV_HAS_SUPPORTED_ME(dev->device_id)) {
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me = 1;
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break;
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}
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if (dev->vendor_id != PCI_VENDOR_ID_INTEL)
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continue;
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if (PCI_DEV_HAS_SUPPORTED_ME(dev->device_id)) {
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me = 1;
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break;
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}
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}
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@ -198,74 +238,28 @@ static struct pci_dev *pci_me_interface_scan(const char **name, char *namebuf,
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return dev;
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}
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static int activate_me(void)
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{
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struct pci_access *pacc;
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struct pci_dev *sb;
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uint32_t rcba_phys;
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pacc = pci_alloc();
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pacc->method = PCI_ACCESS_I386_TYPE1;
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pci_init(pacc);
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pci_scan_bus(pacc);
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sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
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if (!sb) {
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printf("Uh oh, southbridge not on BDF(0:31:0), please report this error, exiting.\n");
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pci_cleanup(pacc);
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return 1;
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}
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pci_fill_info(sb, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
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rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
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rcba = map_physical((off_t)rcba_phys, size);
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if (rcba == NULL) {
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printf("Could not map MEI PCI device memory\n");
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pci_free_dev(sb);
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pci_cleanup(pacc);
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return 1;
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}
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//printf("RCBA at 0x%08" PRIx32 "\n", (uint32_t)rcba_phys);
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fd2 = *(uint32_t *)(rcba + FD2);
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*(uint32_t *)(rcba + FD2) = fd2 & ~0x2;
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if (fd2 & 0x2) {
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printf("MEI was hidden on PCI, now unlocked\n");
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} else {
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printf("MEI not hidden on PCI, checking if visible\n");
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}
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pci_free_dev(sb);
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pci_cleanup(pacc);
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return 0;
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}
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static void dump_me_info(void)
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{
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struct pci_dev *dev;
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uint32_t stat, stat2;
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char namebuf[1024];
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const char *name;
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const char *name = NULL;
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if (pci_platform_scan()) {
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if (pci_platform_scan())
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exit(1);
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}
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if (activate_me()) {
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if (activate_me())
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exit(1);
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}
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dev = pci_me_interface_scan(&name, namebuf, sizeof(namebuf));
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if (!dev) {
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if (!dev)
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exit(1);
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}
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if (name == NULL)
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name = "<unknown>";
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printf("MEI found: [%x:%x] %s\n\n", dev->vendor_id, dev->device_id, name);
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printf("MEI found: [%x:%x] %s\n\n",
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dev->vendor_id, dev->device_id, name);
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stat = pci_read_long(dev, 0x40);
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printf("ME Status : 0x%x\n", stat);
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stat2 = pci_read_long(dev, 0x48);
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@ -276,9 +270,9 @@ static void dump_me_info(void)
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intel_me_extend_valid(dev);
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printf("\n");
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if (stat & 0xf000) {
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printf("ME: has a broken implementation on your board with this BIOS\n");
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}
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if (stat & 0xf000)
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printf("ME: has a broken implementation on your board with"
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"this firmware\n");
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intel_mei_setup(dev);
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usleep(ME_COMMAND_DELAY);
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@ -292,33 +286,24 @@ static void dump_me_info(void)
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usleep(ME_COMMAND_DELAY);
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rehide_me();
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munmap((void*)rcba, size);
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}
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static void print_version(void)
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{
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printf("intelmetool v%s -- ", INTELMETOOL_VERSION);
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printf("Copyright (C) 2015 Damien Zammit\n\n");
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printf(
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"This program is free software: you can redistribute it and/or modify\n"
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"it under the terms of the GNU General Public License as published by\n"
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"the Free Software Foundation, version 2 of the License.\n\n"
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"This program is distributed in the hope that it will be useful,\n"
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"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
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"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
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"GNU General Public License for more details.\n\n");
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printf(GPLV2COPYRIGHT);
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}
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static void print_usage(const char *name)
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{
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printf("usage: %s [-vh?sd]\n", name);
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printf("\n"
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" -v | --version: print the version\n"
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" -h | --help: print this help\n\n"
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" -s | --show: dump all me information on console\n"
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" -d | --debug: enable debug output\n"
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"\n");
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" -v | --version: print the version\n"
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" -h | --help: print this help\n\n"
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" -s | --show: dump all me information on console\n"
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" -d | --debug: enable debug output\n"
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"\n");
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exit(1);
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}
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@ -377,7 +362,8 @@ int main(int argc, char *argv[])
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}
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#ifndef __DARWIN__
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if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
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fd_mem = open("/dev/mem", O_RDWR);
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if (fd_mem < 0) {
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perror("Can not open /dev/mem");
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exit(1);
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}
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@ -24,6 +24,15 @@
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#define INTELMETOOL_VERSION "1.0"
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#define GPLV2COPYRIGHT \
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"This program is free software: you can redistribute it and/or modify\n" \
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"it under the terms of the GNU General Public License as published by\n" \
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"the Free Software Foundation, version 2 of the License.\n\n" \
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"This program is distributed in the hope that it will be useful,\n" \
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"but WITHOUT ANY WARRANTY; without even the implied warranty of\n" \
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"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" \
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"GNU General Public License for more details.\n\n"
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#if defined(__GLIBC__)
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#include <sys/io.h>
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#endif
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@ -58,9 +67,9 @@ extern int debug;
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#define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
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#define PCI_DEV_HAS_ME_DISABLE(x) ( \
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( (x) == PCI_DEVICE_ID_INTEL_ICH8ME ) || \
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( (x) == PCI_DEVICE_ID_INTEL_ICH9ME ) || \
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( (x) == PCI_DEVICE_ID_INTEL_ICH9M ))
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((x) == PCI_DEVICE_ID_INTEL_ICH8ME) || \
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((x) == PCI_DEVICE_ID_INTEL_ICH9ME) || \
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((x) == PCI_DEVICE_ID_INTEL_ICH9M ))
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// Definitely has ME and is very difficult to remove
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#define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
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@ -120,61 +129,61 @@ extern int debug;
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#define PCI_DEVICE_ID_INTEL_X99 0x8d47
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#define PCI_DEV_HAS_ME_DIFFICULT(x) ( \
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( (x) == PCI_DEVICE_ID_INTEL_ICH10R ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3400_MOBILE ) || \
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( (x) == PCI_DEVICE_ID_INTEL_P55 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_PM55 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_H55 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_QM57 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_H57 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_HM55 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Q57 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_HM57 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF ) || \
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( (x) == PCI_DEVICE_ID_INTEL_B55_A ) || \
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( (x) == PCI_DEVICE_ID_INTEL_QS57 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3400 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3420 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_3450 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_B55_B ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Z68 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_P67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_UM67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_HM65 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_H67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_HM67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Q65 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_QS67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Q67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_QM67 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_B65 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_C202 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_C204 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_C206 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_H61 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Z77 ) || \
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( (x) == PCI_DEVICE_ID_INTEL_Z75 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_Q77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_Q75 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_B75 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_H77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_C216 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_QM77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_QS77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_HM77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_UM77 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_HM76 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_HM75 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_HM70 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_NM70 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_QM87 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_DH89XXCC ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_X99 ))
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH10R) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_P55 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PM55 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_H55 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QM57 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_H57 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM55 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Q57 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM57 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_B55_A ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QS57 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3400 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3420 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3450 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_B55_B ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Z68 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_P67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_UM67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM65 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_H67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Q65 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QS67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Q67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QM67 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_B65 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_C202 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_C204 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_C206 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_H61 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Z77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Z75 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Q77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_Q75 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_B75 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_H77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_C216 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QM77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QS77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_UM77 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM76 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM75 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_HM70 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_NM70 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_QM87 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_DH89XXCC ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_X99 ))
|
||||
|
||||
// Not sure if ME present, but should be able to disable it easily
|
||||
#define PCI_DEVICE_ID_INTEL_ICH8 0x2810
|
||||
|
|
@ -185,20 +194,20 @@ extern int debug;
|
|||
#define PCI_DEVICE_ID_INTEL_ICH9 0x2918
|
||||
|
||||
#define PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(x) ( \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH8 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH8M ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH9DH ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH9DO ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH9R ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_ICH9 ))
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH8 ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH8M ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH9DH ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH9DO ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH9R ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_ICH9 ))
|
||||
|
||||
// Not sure at all
|
||||
#define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
|
||||
#define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
|
||||
|
||||
#define PCI_DEV_ME_NOT_SURE(x) ( \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO))
|
||||
((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO))
|
||||
|
||||
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_1 0x1C3A /* Cougar Point */
|
||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_1 0x1D3A /* C600/X79 Patsburg */
|
||||
|
|
@ -244,45 +253,45 @@ extern int debug;
|
|||
#define PCI_DEVICE_ID_INTEL_SUNRISE_LP 0x9d3a /* SUNRISE Point-LP */
|
||||
|
||||
#define PCI_DEV_HAS_SUPPORTED_ME(x) ( \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_PATSBURG_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_3 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CAVECREEK ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_BEARLAKE_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_BEARLAKE_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_BEARLAKE_3 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_BEARLAKE_4 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_BEARLAKE_5 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82946GZ ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82G35 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82Q963 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82P965 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82Q35 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82G33 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82Q33 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_82X38 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_3200 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_PM965 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_GME965 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CANTIGA_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CANTIGA_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CANTIGA_3 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CANTIGA_4 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CANTIGA_5 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_3 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_4 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CALPELLA_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_CALPELLA_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_3 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_4 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_WILDCAT_1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_WILDCAT_2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2 ) || \
|
||||
( (x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP))
|
||||
((x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PATSBURG_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_3) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CAVECREEK) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_3) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_4) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_5) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82946GZ) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82G35) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82Q963) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82P965) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82Q35) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82G33) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82Q33) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_82X38) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_3200) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_PM965) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_GME965) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CANTIGA_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CANTIGA_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CANTIGA_3) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CANTIGA_4) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CANTIGA_5) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_3) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_4) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CALPELLA_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_CALPELLA_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_3) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_4) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_WILDCAT_1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_WILDCAT_2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2) || \
|
||||
((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP))
|
||||
|
|
|
|||
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Damien Zammit <damien@zamaudio.com>
|
||||
* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
#include "intelmetool.h"
|
||||
#include "mmap.h"
|
||||
#include "rcba.h"
|
||||
|
||||
static const int size = 0x4000;
|
||||
|
||||
/* Returns the physical RCBA base address or zero on error. */
|
||||
static u32 get_rcba_phys(void)
|
||||
{
|
||||
struct pci_access *pacc;
|
||||
struct pci_dev *sb;
|
||||
uint32_t rcba_phys;
|
||||
|
||||
pacc = pci_alloc();
|
||||
pacc->method = PCI_ACCESS_I386_TYPE1;
|
||||
|
||||
pci_init(pacc);
|
||||
pci_scan_bus(pacc);
|
||||
|
||||
sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
|
||||
if (!sb) {
|
||||
printf("Uh oh, southbridge not on BDF(0:31:0), please report "
|
||||
"this error, exiting.\n");
|
||||
pci_cleanup(pacc);
|
||||
return 0;
|
||||
}
|
||||
pci_fill_info(sb, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES |
|
||||
PCI_FILL_CLASS);
|
||||
|
||||
rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
|
||||
|
||||
pci_free_dev(sb);
|
||||
pci_cleanup(pacc);
|
||||
|
||||
return rcba_phys;
|
||||
}
|
||||
|
||||
/*
|
||||
* Writes 'val' to RCBA register at address 'addr'.
|
||||
* Returns 1 on error and 0 on success.
|
||||
*/
|
||||
int write_rcba32(uint32_t addr, uint32_t val)
|
||||
{
|
||||
volatile uint8_t *rcba;
|
||||
const uint32_t rcba_phys = get_rcba_phys();
|
||||
|
||||
if (!rcba_phys) {
|
||||
printf("Could not get RCBA address\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
rcba = map_physical((off_t)rcba_phys, size);
|
||||
if (rcba == NULL) {
|
||||
printf("Could not map RCBA\n");
|
||||
return 1;
|
||||
}
|
||||
*(uint32_t *)(rcba + addr) = val;
|
||||
|
||||
munmap((void *)rcba, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Reads RCBA register at address 'addr' and stores it in 'val'.
|
||||
* Returns 1 on error and 0 on success.
|
||||
*/
|
||||
int read_rcba32(uint32_t addr, uint32_t *val)
|
||||
{
|
||||
volatile uint8_t *rcba;
|
||||
const uint32_t rcba_phys = get_rcba_phys();
|
||||
|
||||
if (!rcba_phys) {
|
||||
printf("Could not get RCBA address\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
rcba = map_physical((off_t)rcba_phys, size);
|
||||
if (rcba == NULL) {
|
||||
printf("Could not map RCBA\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
*val = *(uint32_t *)(rcba + addr);
|
||||
|
||||
munmap((void *)rcba, size);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
int write_rcba32(uint32_t addr, uint32_t val);
|
||||
int read_rcba32(uint32_t addr, uint32_t *val);
|
||||
Loading…
Reference in New Issue