From 5eb4c0252f96c7f98f747b7ac2581558443f1b1d Mon Sep 17 00:00:00 2001 From: huang lin Date: Sat, 13 Dec 2014 09:39:23 +0800 Subject: [PATCH] veyron: Support Speedy v1 hardware BUG=None TEST=emerge veyron_speedy and boot the Speedy board BRANCH=None Change-Id: Ida5fd6d839a2e704760a90e9c723c1b688ea6a84 Signed-off-by: Stefan Reinauer Original-Commit-Id: 42c0d11c3ec65874986c06ca4d7b34f5987f9409 Original-Change-Id: I2f0cff74517a8c031eabb64f4f82d455195c8dd1 Original-Signed-off-by: huang lin Original-Reviewed-on: https://chromium-review.googlesource.com/234715 Original-Reviewed-by: Julius Werner Reviewed-on: http://review.coreboot.org/9639 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- .../google/veyron_speedy/mainboard.c | 35 +++++++++++++++---- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/veyron_speedy/mainboard.c b/src/mainboard/google/veyron_speedy/mainboard.c index 8efc65d4dd..c7d51cc948 100644 --- a/src/mainboard/google/veyron_speedy/mainboard.c +++ b/src/mainboard/google/veyron_speedy/mainboard.c @@ -91,9 +91,19 @@ static void configure_vop(void) /* lcdc(vop) iodomain select 1.8V */ writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel); - rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */ - rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ - rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + switch (board_id()) { + case 0: + rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */ + rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ + rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + break; + default: + gpio_output(GPIO(2, B, 5), 1); /* AVDD_1V8_DISP_EN */ + rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ + gpio_output(GPIO(7, B, 6), 1); /* LCD_EN */ + rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + break; + } } static void mainboard_init(device_t dev) @@ -129,8 +139,19 @@ void lb_board(struct lb_header *header) void mainboard_power_on_backlight(void) { - gpio_output(GPIO(7, A, 0), 0); /* BL_EN */ - gpio_output(GPIO(7, A, 2), 1); /* LCD_BL */ - mdelay(10); - gpio_output(GPIO(7, A, 0), 1); /* BL_EN */ + switch (board_id()) { + case 0: + gpio_output(GPIO(7, A, 0), 0); /* BL_EN */ + gpio_output(GPIO(7, A, 2), 1); /* LCD_BL */ + mdelay(10); + gpio_output(GPIO(7, A, 0), 1); /* BL_EN */ + break; + default: + gpio_output(GPIO(2, B, 4), 1); /* BL_PWR_EN */ + mdelay(10); + gpio_output(GPIO(7, A, 2), 1); /* LCD_BL */ + mdelay(10); + gpio_output(GPIO(7, A, 0), 1); /* BL_EN */ + break; + } }