soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default value

This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix
*** Pre-CBMEM romstage console overflowed, log truncated! ***
issue.

TEST=Verified on Hatch CML platform.

Change-Id: I2de4ca2f2001b304850c27df1b3c3b2c827fe25a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34006
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Spoorthi K
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Subrata Banik 2019-07-05 06:43:46 +05:30
parent 4f61f56be1
commit 5ee4c12ebb
1 changed files with 4 additions and 0 deletions

View File

@ -326,4 +326,8 @@ config USE_LEGACY_8254_TIMER
This sets the Enable8254ClockGating UPD, which according to the FSP Integration This sets the Enable8254ClockGating UPD, which according to the FSP Integration
guide needs to be disabled in order to boot SeaBIOS, but should otherwise be enabled. guide needs to be disabled in order to boot SeaBIOS, but should otherwise be enabled.
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00
endif endif