soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default value
This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix *** Pre-CBMEM romstage console overflowed, log truncated! *** issue. TEST=Verified on Hatch CML platform. Change-Id: I2de4ca2f2001b304850c27df1b3c3b2c827fe25a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Spoorthi K Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -326,4 +326,8 @@ config USE_LEGACY_8254_TIMER
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This sets the Enable8254ClockGating UPD, which according to the FSP Integration
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This sets the Enable8254ClockGating UPD, which according to the FSP Integration
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guide needs to be disabled in order to boot SeaBIOS, but should otherwise be enabled.
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guide needs to be disabled in order to boot SeaBIOS, but should otherwise be enabled.
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config PRERAM_CBMEM_CONSOLE_SIZE
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hex
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default 0xe00
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endif
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endif
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