util/intelp2m: Add support for Cannonlake-LP SoCs
Add support for Cannonlake-LP SoCs (Whiskeylake-U, Coffeelake-U, Cometlake-U) as a separate parsing profile, copying the existing 'Sunrise' profile and adjusting for differences in reset mapping and GPIO macro generation Test: convert inteltool GPIO log dump into coreboot macros for an out-of-tree CML-U board. Change-Id: I86296697ee892af7aa0818fb608b6d68fad2f307 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
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@ -27,6 +27,7 @@ const (
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SunriseType uint8 = 0
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LewisburgType uint8 = 1
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ApolloType uint8 = 2
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CannonType uint8 = 3
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)
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var key uint8 = SunriseType
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@ -34,7 +35,8 @@ var key uint8 = SunriseType
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var platform = map[string]uint8{
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"snr": SunriseType,
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"lbg": LewisburgType,
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"apl": ApolloType}
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"apl": ApolloType,
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"cnl": CannonType}
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func PlatformSet(name string) int {
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if platformType, valid := platform[name]; valid {
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key = platformType
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@ -57,6 +59,9 @@ func IsPlatformSunrise() bool {
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func IsPlatformLewisburg() bool {
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return IsPlatform(LewisburgType)
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}
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func IsPlatformCannonLake() bool {
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return IsPlatform(CannonType)
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}
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var InputRegDumpFile *os.File = nil
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var OutputGenFile *os.File = nil
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@ -37,6 +37,7 @@ platform type is set using the -p option (Sunrise by default):
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snr - Sunrise PCH with Skylake/Kaby Lake CPU
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lbg - Lewisburg PCH with Xeon SP CPU
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apl - Apollo Lake SoC
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cnl - CannonLake-LP or Whiskeylake/Coffelake/Cometlake-U SoC
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(default "snr")
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(shell)$ ./intelp2m -p <platform> -file path/to/inteltool.log
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@ -198,4 +199,4 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
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```
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### Supports Chipsets
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Sunrise PCH, Lewisburg PCH, Apollo Lake SoC
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Sunrise PCH, Lewisburg PCH, Apollo Lake SoC, CannonLake-LP SoCs
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@ -81,7 +81,8 @@ func main() {
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platform := flag.String("p", "snr", "set platform:\n"+
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"\tsnr - Sunrise PCH or Skylake/Kaby Lake SoC\n"+
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"\tlbg - Lewisburg PCH with Xeon SP\n"+
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"\tapl - Apollo Lake SoC\n")
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"\tapl - Apollo Lake SoC\n"+
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"\tcnl - CannonLake-LP or Whiskeylake/Coffelake/Cometlake-U SoC\n")
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filedstyle := flag.String("fld", "none", "set fileds macros style:\n"+
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"\tcb - use coreboot style for bit fields macros\n"+
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@ -10,6 +10,7 @@ import (
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import "../platforms/snr"
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import "../platforms/lbg"
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import "../platforms/apl"
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import "../platforms/cnl"
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import "../config"
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// PlatformSpecific - platform-specific interface
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@ -141,6 +142,9 @@ func (parser *ParserData) PlatformSpecificInterfaceSet() {
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InheritanceTemplate : snr.PlatformSpecific{},
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},
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config.ApolloType : apl.PlatformSpecific{},
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config.CannonType : cnl.PlatformSpecific{
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InheritanceTemplate : snr.PlatformSpecific{},
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},
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}
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parser.platform = platform[config.PlatformGet()]
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}
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@ -198,7 +202,7 @@ func (parser *ParserData) padOwnershipExtract() bool {
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// padConfigurationExtract - reads GPIO configuration registers and returns true if the
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// information from the inteltool log was successfully parsed.
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func (parser *ParserData) padConfigurationExtract() bool {
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// Only for Sunrise PCH and only for inteltool.log file template
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// Only for Sunrise or CannonLake, and only for inteltool.log file template
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if config.TemplateGet() != config.TempInteltool || config.IsPlatformApollo() {
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return false
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}
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@ -0,0 +1,215 @@
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package cnl
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import "strings"
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import "fmt"
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// Local packages
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import "../common"
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import "../../config"
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import "../../fields"
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import "../snr"
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const (
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PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
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PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
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)
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const (
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PAD_CFG_DW0 = common.PAD_CFG_DW0
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PAD_CFG_DW1 = common.PAD_CFG_DW1
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MAX_DW_NUM = common.MAX_DW_NUM
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)
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type InheritanceMacro interface {
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GpoMacroAdd()
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NativeFunctionMacroAdd()
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NoConnMacroAdd()
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}
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type PlatformSpecific struct {
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InheritanceMacro
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InheritanceTemplate
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}
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// RemmapRstSrc - remmap Pad Reset Source Config
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func (PlatformSpecific) RemmapRstSrc() {
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macro := common.GetMacro()
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if config.TemplateGet() != config.TempInteltool {
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// Use reset source remapping only if the input file is inteltool.log dump
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return
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}
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if strings.Contains(macro.PadIdGet(), "GPP_A") ||
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strings.Contains(macro.PadIdGet(), "GPP_B") ||
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strings.Contains(macro.PadIdGet(), "GPP_G") {
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// See reset map for the Cannonlake Groups the Community 0:
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// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/cannonlake/gpio.c#L14
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// remmap is not required because it is the same as common.
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return
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}
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dw0 := macro.Register(PAD_CFG_DW0)
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var remapping = map[uint8]uint32{
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0: common.RST_RSMRST << common.PadRstCfgShift,
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1: common.RST_DEEP << common.PadRstCfgShift,
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2: common.RST_PLTRST << common.PadRstCfgShift,
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}
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resetsrc, valid := remapping[dw0.GetResetConfig()]
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if valid {
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// dw0.SetResetConfig(resetsrc)
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ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()]
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dw0.ValueSet(ResetConfigFieldVal)
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} else {
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fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet())
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}
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dw0.CntrMaskFieldsClear(common.PadRstCfgMask)
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}
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// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
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// as a new argument
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func (PlatformSpecific) Pull() {
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macro := common.GetMacro()
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dw1 := macro.Register(PAD_CFG_DW1)
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var pull = map[uint8]string{
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0x0: "NONE",
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0x2: "DN_5K",
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0x4: "DN_20K",
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0x9: "UP_1K",
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0xa: "UP_5K",
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0xb: "UP_2K",
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0xc: "UP_20K",
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0xd: "UP_667",
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0xf: "NATIVE",
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}
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str, valid := pull[dw1.GetTermination()]
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if !valid {
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str = "INVALID"
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fmt.Println("Error",
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macro.PadIdGet(),
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" invalid TERM value = ",
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int(dw1.GetTermination()))
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}
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macro.Separator().Add(str)
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}
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// Generate macro to cause peripheral IRQ when configured in GPIO input mode
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func ioApicRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
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return false
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}
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macro.Add("_APIC")
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// PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
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macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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return true
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}
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// Generate macro to cause NMI when configured in GPIO input mode
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func nmiRoute() bool {
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macro := common.GetMacro()
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if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 {
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return false
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}
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// PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
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macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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return true
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}
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// Generate macro to cause SCI when configured in GPIO input mode
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func sciRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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if dw0.GetGPIOInputRouteSCI() == 0 {
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return false
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}
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// PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv)
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macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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return true
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}
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// Generate macro to cause SMI when configured in GPIO input mode
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func smiRoute() bool {
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macro := common.GetMacro()
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dw0 := macro.Register(PAD_CFG_DW0)
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if dw0.GetGPIOInputRouteSMI() == 0 {
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return false
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}
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// PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv)
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macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
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return true
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}
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// Adds PAD_CFG_GPI macro with arguments
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func (PlatformSpecific) GpiMacroAdd() {
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macro := common.GetMacro()
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var ids []string
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macro.Set("PAD_CFG_GPI")
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for routeid, isRoute := range map[string]func() (bool) {
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"IOAPIC": ioApicRoute,
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"SCI": sciRoute,
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"SMI": smiRoute,
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"NMI": nmiRoute,
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} {
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if isRoute() {
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ids = append(ids, routeid)
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}
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}
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switch argc := len(ids); argc {
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case 0:
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// e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
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macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
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case 1:
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// GPI with IRQ route
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if config.AreFieldsIgnored() {
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// Set Host Software Ownership to ACPI mode
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macro.SetPadOwnership(common.PAD_OWN_ACPI)
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}
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case 2:
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// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
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macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
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macro.Add(", " + ids[0] + ", " + ids[1] + "),")
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if config.AreFieldsIgnored() {
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// Set Host Software Ownership to ACPI mode
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macro.SetPadOwnership(common.PAD_OWN_ACPI)
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}
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default:
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// Clear the control mask so that the check fails and "Advanced" macro is
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// generated
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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}
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}
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// Adds PAD_CFG_GPO macro with arguments
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func (platform PlatformSpecific) GpoMacroAdd() {
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platform.InheritanceMacro.GpoMacroAdd()
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}
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// Adds PAD_CFG_NF macro with arguments
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func (platform PlatformSpecific) NativeFunctionMacroAdd() {
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platform.InheritanceMacro.NativeFunctionMacroAdd()
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}
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// Adds PAD_NC macro
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func (platform PlatformSpecific) NoConnMacroAdd() {
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platform.InheritanceMacro.NoConnMacroAdd()
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}
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// GenMacro - generate pad macro
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// dw0 : DW0 config register value
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// dw1 : DW1 config register value
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// return: string of macro
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// error
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func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string {
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macro := common.GetInstanceMacro(PlatformSpecific{InheritanceMacro : snr.PlatformSpecific{}},
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fields.InterfaceGet())
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macro.Clear()
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields)
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macro.PadIdSet(id).SetPadOwnership(ownership)
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macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS)
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macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS)
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return macro.Generate()
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}
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@ -0,0 +1,33 @@
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package cnl
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import "strings"
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type InheritanceTemplate interface {
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KeywordCheck(line string) bool
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}
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// GroupNameExtract - This function extracts the group ID, if it exists in a row
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// line : string from the configuration file
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// return
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// bool : true if the string contains a group identifier
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// string : group identifier
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func (PlatformSpecific) GroupNameExtract(line string) (bool, string) {
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for _, groupKeyword := range []string{
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"GPP_A", "GPP_B", "GPP_G",
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"GPP_D", "GPP_F", "GPP_H",
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"GPD", "GPP_C", "GPP_E",
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} {
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if strings.Contains(line, groupKeyword) {
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return true, groupKeyword
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}
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}
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return false, ""
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}
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// KeywordCheck - This function is used to filter parsed lines of the configuration file and
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// returns true if the keyword is contained in the line.
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// line : string from the configuration file
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func (platform PlatformSpecific) KeywordCheck(line string) bool {
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return platform.InheritanceTemplate.KeywordCheck(line)
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}
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