mainboard/google/kahlee: Create Liara variant
This is based on the Grunt variant. BUG=b:111607004 TEST=Build Liara Change-Id: I8f23e972be0d1665c736d61621a0caaa4c4c5551 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/27539 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Martin Roth
parent
5254104b46
commit
5ef51edd4c
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@ -56,6 +56,7 @@ config VARIANT_DIR
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default "aleena" if BOARD_GOOGLE_ALEENA
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default "aleena" if BOARD_GOOGLE_ALEENA
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default "careena" if BOARD_GOOGLE_CAREENA
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default "careena" if BOARD_GOOGLE_CAREENA
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default "grunt" if BOARD_GOOGLE_GRUNT
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default "grunt" if BOARD_GOOGLE_GRUNT
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default "liara" if BOARD_GOOGLE_LIARA
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config MAINBOARD_PART_NUMBER
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config MAINBOARD_PART_NUMBER
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string
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string
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@ -107,6 +108,7 @@ config GBB_HWID
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default "ALEENA TEST 7281" if BOARD_GOOGLE_ALEENA
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default "ALEENA TEST 7281" if BOARD_GOOGLE_ALEENA
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default "CAREENA TEST 8777" if BOARD_GOOGLE_CAREENA
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default "CAREENA TEST 8777" if BOARD_GOOGLE_CAREENA
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default "GRUNT TEST 8296" if BOARD_GOOGLE_GRUNT
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default "GRUNT TEST 8296" if BOARD_GOOGLE_GRUNT
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default "LIARA TEST 0464" if BOARD_GOOGLE_LIARA
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config AMD_FWM_POSITION_INDEX
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config AMD_FWM_POSITION_INDEX
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int
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int
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@ -9,3 +9,6 @@ config BOARD_GOOGLE_CAREENA
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config BOARD_GOOGLE_GRUNT
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config BOARD_GOOGLE_GRUNT
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bool "-> Grunt"
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bool "-> Grunt"
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select BOARD_GOOGLE_BASEBOARD_KAHLEE
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select BOARD_GOOGLE_BASEBOARD_KAHLEE
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config BOARD_GOOGLE_LIARA
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bool "-> Liara"
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select BOARD_GOOGLE_BASEBOARD_KAHLEE
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@ -0,0 +1,20 @@
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2017 Google, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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subdirs-y += ../baseboard/spd
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romstage-y += ../baseboard/romstage.c
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ramstage-y += ../baseboard/mainboard.c
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@ -0,0 +1,164 @@
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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chip soc/amd/stoneyridge
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register "spd_addr_lookup" = "
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{
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{ {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0
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}"
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register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
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register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
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register "uma_size" = "32 * MiB"
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# Enable I2C0 for audio, USB3 hub at 400kHz
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register "i2c[0]" = "{
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 95,
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.fall_time_ns = 3,
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}"
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# Enable I2C1 for H1 at 400kHz
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register "i2c[1]" = "{
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.early_init = 1,
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 84,
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.fall_time_ns = 4,
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}"
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# Enable I2C2 for trackpad, pen at 400kHz
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register "i2c[2]" = "{
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 117,
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.fall_time_ns = 113,
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}"
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# Enable I2C3 for touchscreen at 400kHz
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register "i2c[3]" = "{
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 82,
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.fall_time_ns = 67,
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}"
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device cpu_cluster 0 on
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device lapic 10 on end
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end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
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device pci 1.1 on end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end #
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device pci 2.2 on end #
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device pci 2.3 on end #
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device pci 2.4 on
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chip drivers/generic/bayhub
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register "power_saving" = "1"
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device pci 00.0 on end
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end
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end #
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device pci 2.5 on end #
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device pci 8.0 on end # PSP
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device pci 9.0 on end # PCIe Host Bridge
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device pci 9.2 on end # HDA
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device pci 10.0 on end # xHCI
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device pci 11.0 on end # SATA
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device pci 12.0 on end # EHCI
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device pci 14.0 on # SMbus
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end # SMbus
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device pci 14.3 on
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chip ec/google/chromeec
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device pnp 0c09.0 on end
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end
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end # LPC
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device pci 14.7 on end # SD
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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device mmio 0xfedc2000 on
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chip drivers/generic/adau7002
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device generic 0.0 on end
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end
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chip drivers/i2c/da7219
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_14)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "500"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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register "mclk_name" = ""oscout1""
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device i2c 1a on end
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end
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chip drivers/generic/max98357a
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register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_119)"
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register "sdmode_delay" = "5"
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device generic 0.1 on end
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end
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end
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device mmio 0xfedc3000 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "desc" = ""Cr50 TPM""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)"
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device i2c 50 on end
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end
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end
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device mmio 0xfedc4000 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)"
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register "wake" = "7"
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device i2c 15 on end
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end
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end
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device mmio 0xfedc5000 on
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chip drivers/i2c/generic
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register "hid" = ""RAYD0001""
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register "desc" = ""Raydium Touchscreen""
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register "probed" = "1"
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register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)"
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register "reset_delay_ms" = "20"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
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register "enable_delay_ms" = "1"
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register "has_power_resource" = "1"
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device i2c 39 on end
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end
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chip drivers/i2c/generic
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register "hid" = ""ELAN0001""
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register "desc" = ""ELAN Touchscreen""
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register "probed" = "1"
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register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)"
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register "reset_delay_ms" = "20"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
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register "enable_delay_ms" = "1"
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register "has_power_resource" = "1"
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device i2c 10 on end
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end
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end
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end #chip soc/amd/stoneyridge
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@ -0,0 +1,14 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <baseboard/acpi/gpe.asl>
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@ -0,0 +1,15 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||||
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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||||||
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*/
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#include <baseboard/acpi/mainboard.asl>
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#include <baseboard/acpi/audio.asl>
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@ -0,0 +1,14 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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||||||
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* the Free Software Foundation; version 2 of the License.
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||||||
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*
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* This program is distributed in the hope that it will be useful,
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||||||
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||||
|
* GNU General Public License for more details.
|
||||||
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*/
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#include <baseboard/acpi/routing.asl>
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@ -0,0 +1,14 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
|
||||||
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* it under the terms of the GNU General Public License as published by
|
||||||
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* the Free Software Foundation; version 2 of the License.
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||||||
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*
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* This program is distributed in the hope that it will be useful,
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||||||
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
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*/
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#include <baseboard/acpi/sleep.asl>
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@ -0,0 +1,14 @@
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/*
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* This file is part of the coreboot project.
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||||||
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*
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||||||
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* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
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*
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||||||
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* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
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||||||
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#include <baseboard/acpi/thermal.asl>
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@ -0,0 +1,17 @@
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||||||
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/*
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||||||
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* This file is part of the coreboot project.
|
||||||
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*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
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||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
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||||||
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#include <baseboard/ec.h>
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||||||
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/* Enable EC backed Keyboard Backlight in ACPI */
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#define EC_ENABLE_KEYBOARD_BACKLIGHT
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@ -0,0 +1,16 @@
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||||||
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/*
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||||||
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* This file is part of the coreboot project.
|
||||||
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*
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||||||
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* Copyright (C) 2017 Google Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
|
||||||
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|
||||||
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#include <baseboard/gpio.h>
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||||||
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@ -0,0 +1,38 @@
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||||||
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/*
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||||||
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* This file is part of the coreboot project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2014 Google Inc.
|
||||||
|
* Copyright (C) 2017 Advanced Micro Devices, Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
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#ifndef THERMAL_H
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||||||
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#define THERMAL_H
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||||||
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|
||||||
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/*
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||||||
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* Stoney Ridge Thermal Requirements 12 (6W)
|
||||||
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* TDP (W) 6
|
||||||
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* T die,max (°C) 95
|
||||||
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* T ctl,max 85
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||||||
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* T die,lmt (default) 90
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||||||
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* T ctl,lmt (default) 80
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||||||
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*/
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|
||||||
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/* Control TDP Settings */
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#define CTL_TDP_SENSOR_ID 2 /* EC TIN2 */
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||||||
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|
||||||
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/* Temperature which OS will shutdown at */
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||||||
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#define CRITICAL_TEMPERATURE 94
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||||||
|
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|
/* Temperature which OS will throttle CPU */
|
||||||
|
#define PASSIVE_TEMPERATURE 85
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue