mb/google/dedede/var/boten: Modify DPTF parameters
DPTF parameters from thermal team. 1. Modify TSR1 sensor as charge sensor. 2. Modify P-state parameter BUG=b:180641150 BRANCH=dedede TEST=build and verified by thermal team. Change-Id: I43002db61de650d29cd85944a4eaea1b2f99aec4 Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52755 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -87,15 +87,48 @@ chip soc/intel/jasperlake
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000),}"
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 15000)
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),}"
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN)
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}"
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## Power Limits Control
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 3000,
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.max_power = 6000,
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.time_window_min = 1 * MSECS_PER_SEC,
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.time_window_max = 1 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 20000,
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.max_power = 20000,
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.time_window_min = 1 * MSECS_PER_SEC,
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.time_window_max = 1 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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register "options.tsr[0].desc" = ""Memory""
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register "options.tsr[1].desc" = ""Charger""
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 3000 },
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[1] = { 24, 2000 },
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[2] = { 16, 1500 },
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[3] = { 8, 1000 }
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}"
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device generic 0 on end
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end
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end
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end # SA Thermal device
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device pci 14.0 on
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chip drivers/usb/acpi
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register "desc" = ""Root Hub""
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