mb/google/dedede/var/boten: Modify DPTF parameters

DPTF parameters from thermal team.

1. Modify TSR1 sensor as charge sensor.
2. Modify P-state parameter

BUG=b:180641150
BRANCH=dedede
TEST=build and verified by thermal team.

Change-Id: I43002db61de650d29cd85944a4eaea1b2f99aec4
Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52755
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Stanley Wu 2021-04-29 17:17:27 +08:00 committed by Patrick Georgi
parent 351f1e68c4
commit 5f126a08c8
1 changed files with 36 additions and 3 deletions

View File

@ -87,15 +87,48 @@ chip soc/intel/jasperlake
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000),}"
[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 15000)
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),}"
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN)
}"
## Power Limits Control
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
register "options.tsr[0].desc" = ""Memory""
register "options.tsr[1].desc" = ""Charger""
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 3000 },
[1] = { 24, 2000 },
[2] = { 16, 1500 },
[3] = { 8, 1000 }
}"
device generic 0 on end
end
end
end # SA Thermal device
device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""