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util/amdfwtool: add MSMU, SPIROM_CFG and DMCUB PSP FW types 

Compared to Cezanne, the Sabrina SoC has a 3 additional PSP firmware
table entries, so add those as a preparation for Sabrina support.

Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iaa5aacd53b3c7637f6d5e94b1a8d92bba57ddb9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2022-03-24 02:04:51 +01:00
parent b6bb0c88be
commit 5f18bb75fb
3 changed files with 15 additions and 0 deletions
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3
util/amdfwtool/amdfwtool.c
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@ -260,6 +260,9 @@ amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_FW_SPL, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_SPL, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB },
{ .type = AMD_ABL0, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_ABL0, .level = PSP_BOTH | PSP_LVL2_AB },

3
util/amdfwtool/amdfwtool.h
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@ -54,6 +54,9 @@ typedef enum _amd_fw_type {
AMD_FW_SPL = 0x55, AMD_FW_SPL = 0x55,
AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ERAM = 0x58,
AMD_FW_DMCU_ISR = 0x59, AMD_FW_DMCU_ISR = 0x59,
AMD_FW_MSMU = 0x5a,
AMD_FW_SPIROM_CFG = 0x5c,
AMD_FW_DMCUB = 0x71,
AMD_FW_PSP_BOOTLOADER_AB = 0x73, AMD_FW_PSP_BOOTLOADER_AB = 0x73,
AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */
AMD_FW_GEC, AMD_FW_GEC,

9
util/amdfwtool/data_parse.c
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@ -306,6 +306,15 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
} else if (strcmp(fw_name, "DMCUINTVECTORSDCN21_FILE") == 0) { } else if (strcmp(fw_name, "DMCUINTVECTORSDCN21_FILE") == 0) {
fw_type = AMD_FW_DMCU_ISR; fw_type = AMD_FW_DMCU_ISR;
subprog = 0; subprog = 0;
} else if (strcmp(fw_name, "MSMU_FILE") == 0) {
fw_type = AMD_FW_MSMU;
subprog = 0;
} else if (strcmp(fw_name, "DMCUB_FILE") == 0) {
fw_type = AMD_FW_DMCUB;
subprog = 0;
} else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) {
fw_type = AMD_FW_SPIROM_CFG;
subprog = 0;
} else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) { } else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) {
fw_type = AMD_FW_KVM_IMAGE; fw_type = AMD_FW_KVM_IMAGE;
subprog = 0; subprog = 0;