soc/intel/skylake: Control fixed IO decode from devicetree
The current implementation doesn't allow custom values for the LPC IO decodes and IO enables. Add the lpc_ioe and lpc_iod values. If they are not zero, they will be used instead of the current handling for COMA and COMB. BUG=N/A TEST=tested on facebook monolith Change-Id: Iad7bb0e44739e8d656a542c79af7f98a4e9bde69 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38748 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -72,6 +72,8 @@ struct lpc_mmio_range {
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uint16_t lpc_enable_fixed_io_ranges(uint16_t io_enables);
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/* Return the current decode settings */
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uint16_t lpc_get_fixed_io_decode(void);
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/* Set the current decode ranges */
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uint16_t lpc_set_fixed_io_ranges(uint16_t io_ranges, uint16_t mask);
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/* Open a generic IO window to the LPC bus. Four windows are available. */
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void lpc_open_pmio_window(uint16_t base, uint16_t size);
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/* Close all generic IO windows to the LPC bus. */
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@ -42,6 +42,17 @@ uint16_t lpc_get_fixed_io_decode(void)
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return pci_read_config16(PCH_DEV_LPC, LPC_IO_DECODE);
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}
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uint16_t lpc_set_fixed_io_ranges(uint16_t io_ranges, uint16_t mask)
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{
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uint16_t reg_io_ranges;
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reg_io_ranges = lpc_get_fixed_io_decode() & ~mask;
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io_ranges |= reg_io_ranges & mask;
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pci_write_config16(PCH_DEV_LPC, LPC_IO_DECODE, io_ranges);
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return io_ranges;
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}
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/*
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* Find the first unused IO window.
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* Returns -1 if not found, 0 for reg 0x84, 1 for reg 0x88 ...
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@ -127,9 +127,16 @@ void pch_early_iorange_init(void)
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uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
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LPC_IOE_EC_62_66;
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/* IO Decode Range */
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if (CONFIG(DRIVERS_UART_8250IO))
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lpc_io_setup_comm_a_b();
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const config_t *config = config_of_soc();
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if (config->lpc_ioe) {
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io_enables = config->lpc_ioe & 0x3f0f;
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lpc_set_fixed_io_ranges(config->lpc_iod, 0x1377);
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} else {
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/* IO Decode Range */
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if (CONFIG(DRIVERS_UART_8250IO))
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lpc_io_setup_comm_a_b();
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}
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/* IO Decode Enable */
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if (pch_check_decode_enable() == 0) {
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@ -79,6 +79,10 @@ struct soc_intel_skylake_config {
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uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */
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uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */
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/* LPC fixed enables and ranges */
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uint16_t lpc_iod;
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uint16_t lpc_ioe;
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/* Generic IO decode ranges */
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uint32_t gen1_dec;
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uint32_t gen2_dec;
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