soc/intel/skylake: Control fixed IO decode from devicetree

The current implementation doesn't allow custom values for the LPC IO
decodes and IO enables.

Add the lpc_ioe and lpc_iod values. If they are not zero, they will be
used instead of the current handling for COMA and COMB.

BUG=N/A
TEST=tested on facebook monolith

Change-Id: Iad7bb0e44739e8d656a542c79af7f98a4e9bde69
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38748
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wim Vervoorn 2020-02-03 15:32:54 +01:00 committed by Patrick Georgi
parent 53a9e41891
commit 5f2adfe1a3
4 changed files with 27 additions and 3 deletions

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@ -72,6 +72,8 @@ struct lpc_mmio_range {
uint16_t lpc_enable_fixed_io_ranges(uint16_t io_enables); uint16_t lpc_enable_fixed_io_ranges(uint16_t io_enables);
/* Return the current decode settings */ /* Return the current decode settings */
uint16_t lpc_get_fixed_io_decode(void); uint16_t lpc_get_fixed_io_decode(void);
/* Set the current decode ranges */
uint16_t lpc_set_fixed_io_ranges(uint16_t io_ranges, uint16_t mask);
/* Open a generic IO window to the LPC bus. Four windows are available. */ /* Open a generic IO window to the LPC bus. Four windows are available. */
void lpc_open_pmio_window(uint16_t base, uint16_t size); void lpc_open_pmio_window(uint16_t base, uint16_t size);
/* Close all generic IO windows to the LPC bus. */ /* Close all generic IO windows to the LPC bus. */

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@ -42,6 +42,17 @@ uint16_t lpc_get_fixed_io_decode(void)
return pci_read_config16(PCH_DEV_LPC, LPC_IO_DECODE); return pci_read_config16(PCH_DEV_LPC, LPC_IO_DECODE);
} }
uint16_t lpc_set_fixed_io_ranges(uint16_t io_ranges, uint16_t mask)
{
uint16_t reg_io_ranges;
reg_io_ranges = lpc_get_fixed_io_decode() & ~mask;
io_ranges |= reg_io_ranges & mask;
pci_write_config16(PCH_DEV_LPC, LPC_IO_DECODE, io_ranges);
return io_ranges;
}
/* /*
* Find the first unused IO window. * Find the first unused IO window.
* Returns -1 if not found, 0 for reg 0x84, 1 for reg 0x88 ... * Returns -1 if not found, 0 for reg 0x84, 1 for reg 0x88 ...

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@ -127,9 +127,16 @@ void pch_early_iorange_init(void)
uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
LPC_IOE_EC_62_66; LPC_IOE_EC_62_66;
const config_t *config = config_of_soc();
if (config->lpc_ioe) {
io_enables = config->lpc_ioe & 0x3f0f;
lpc_set_fixed_io_ranges(config->lpc_iod, 0x1377);
} else {
/* IO Decode Range */ /* IO Decode Range */
if (CONFIG(DRIVERS_UART_8250IO)) if (CONFIG(DRIVERS_UART_8250IO))
lpc_io_setup_comm_a_b(); lpc_io_setup_comm_a_b();
}
/* IO Decode Enable */ /* IO Decode Enable */
if (pch_check_decode_enable() == 0) { if (pch_check_decode_enable() == 0) {

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@ -79,6 +79,10 @@ struct soc_intel_skylake_config {
uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */ uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */
uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */ uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */
/* LPC fixed enables and ranges */
uint16_t lpc_iod;
uint16_t lpc_ioe;
/* Generic IO decode ranges */ /* Generic IO decode ranges */
uint32_t gen1_dec; uint32_t gen1_dec;
uint32_t gen2_dec; uint32_t gen2_dec;