From 5f2f44a4cf31ff1aa9aebe3f81767dd2d288c47c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 29 Jun 2020 23:56:50 +0300 Subject: [PATCH] soc/amd/common: Redo ACPIMMIO_BASE and _BANK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I31f2d04d9fc8bdd9e270fb3cb48d71f215999a50 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/42894 Reviewed-by: Felix Held Reviewed-by: Angel Pons Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/acpimmio/mmio_util.c | 5 +---- .../amd/common/block/include/amdblocks/acpimmio_map.h | 9 +++------ src/soc/amd/picasso/acpi/aoac.asl | 2 +- 3 files changed, 5 insertions(+), 11 deletions(-) diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c index 6231d49e12..b2df8e7d4d 100644 --- a/src/soc/amd/common/block/acpimmio/mmio_util.c +++ b/src/soc/amd/common/block/acpimmio/mmio_util.c @@ -5,12 +5,9 @@ #include #include -#define ACPI_BANK_PTR(bank) \ - (void *)(uintptr_t)(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ ## bank ## _BANK) - #if CONSTANT_ACPIMMIO_BASE_ADDRESS #define DECLARE_ACPIMMIO(ptr, bank) \ - uint8_t *const ptr = ACPI_BANK_PTR(bank) + uint8_t *const ptr = (void *)(uintptr_t)ACPIMMIO_BASE(bank) #else #define DECLARE_ACPIMMIO(ptr, bank) uint8_t *ptr #endif diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h index 69cc57a752..176dc2b9a6 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h @@ -95,13 +95,10 @@ #define AMD_SB_ACPI_MMIO_ADDR 0xfed80000 #ifdef __ACPI__ - -/* ASL fails on additions. */ +/* ASL MemoryFixed32() fails if these are additions. */ #define ACPIMMIO_MISC_BASE 0xfed80e00 #define ACPIMMIO_GPIO0_BASE 0xfed81500 -#define ACPIMMIO_AOAC_BASE 0xfed81e00 - -#else +#endif #define ACPIMMIO_SM_PCI_BANK 0x0000 #define ACPIMMIO_GPIO_100_BANK 0x0100 @@ -126,6 +123,6 @@ #define ACPIMMIO_ACDCTMR_BANK 0x1d00 #define ACPIMMIO_AOAC_BANK 0x1e00 -#endif +#define ACPIMMIO_BASE(bank) (AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ ## bank ## _BANK) #endif /* AMD_BLOCK_ACPIMMIO_MAP_H */ diff --git a/src/soc/amd/picasso/acpi/aoac.asl b/src/soc/amd/picasso/acpi/aoac.asl index ffdfcd451c..461b78cabc 100644 --- a/src/soc/amd/picasso/acpi/aoac.asl +++ b/src/soc/amd/picasso/acpi/aoac.asl @@ -4,7 +4,7 @@ #define AOAC_DEVICE(DEV_NAME, DEV_ID, SX) \ PowerResource(DEV_NAME, SX, 0) { \ - OperationRegion (AOAC, SystemMemory, ACPIMMIO_AOAC_BASE + 0x40 + (DEV_ID << 1), 2) \ + OperationRegion (AOAC, SystemMemory, ACPIMMIO_BASE(AOAC) + 0x40 + (DEV_ID << 1), 2) \ Field (AOAC, ByteAcc, NoLock, Preserve) { \ /* \ * Target Device State \