google/kahlee: Pass GPIO setting in amdinitenv
GPIOs for I2C3 were being unset in amdinitmid if the GPIO enable table wasn't passed. It had been initialy set in amdinitreset. Pull the GPIO settings into their own file that can be used in bootblock and later stages. Change-Id: I41cd7873f8c8543c95ad8653e0a3887f7d0487a2 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -19,6 +19,8 @@
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#include <soc/hudson.h>
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#include <soc/hudson.h>
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#include <stdlib.h>
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#include <stdlib.h>
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extern const GPIO_CONTROL oem_kahlee_gpio[];
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static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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{
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{
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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@ -26,6 +28,7 @@ static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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if (StdHeader->Func == AMD_INIT_ENV) {
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if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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FchParams_env->PostOemGpioTable = oem_kahlee_gpio;
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/* XHCI configuration */
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/* XHCI configuration */
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if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
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if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
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@ -17,14 +17,17 @@ bootblock-y += bootblock/bootblock.c
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bootblock-y += bootblock/BiosCallOuts.c
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bootblock-y += bootblock/BiosCallOuts.c
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bootblock-y += bootblock/OemCustomize.c
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bootblock-y += bootblock/OemCustomize.c
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bootblock-y += ec.c
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bootblock-y += ec.c
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bootblock-y += gpio.c
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romstage-y += BiosCallOuts.c
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romstage-y += BiosCallOuts.c
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romstage-y += chromeos.c
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romstage-y += chromeos.c
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romstage-y += gpio.c
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romstage-y += OemCustomize.c
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romstage-y += OemCustomize.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += chromeos.c
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ramstage-y += chromeos.c
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ramstage-y += ec.c
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ramstage-y += ec.c
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ramstage-y += gpio.c
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ramstage-y += OemCustomize.c
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ramstage-y += OemCustomize.c
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verstage-y += chromeos.c
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verstage-y += chromeos.c
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@ -19,80 +19,7 @@
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#include <soc/hudson.h>
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#include <soc/hudson.h>
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#include <stdlib.h>
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#include <stdlib.h>
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static const GPIO_CONTROL oem_kahlee_gpio[] = {
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extern const GPIO_CONTROL oem_kahlee_gpio[];
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/* SER TX */
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{8, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* SER RX */
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{9, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* AGPIO 12 */
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{12, Function2, FCH_GPIO_PULL_UP_ENABLE },
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/* TS_EN_SOC (TouchScreen enable GPIO) */
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{13, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* CAM_PWRON (Camera enable GPIO) */
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{14, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* EC_IN_RW */
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{15, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* APU_I2C_3_SCL */
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{19, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* APU_I2C_3_SDA */
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{20, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* APU_BT_ON# */
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{24, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* DEVSLP1_SSD */
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{67, Function1, FCH_GPIO_PULL_UP_ENABLE},
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/* DEVSLP1_EMMC */
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/* No Connect for now.
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* {70, Function1, FCH_GPIO_PULL_UP_ENABLE},
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*/
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/* SPI_TPM_CS_L */
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{76, Function1, FCH_GPIO_PULL_DOWN_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* CAM_LED# */
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{84, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* TS_RST# (TouchScreen Reset) */
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{85, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* WLAN_RST#_AUX */
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{119, Function2, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* BD_ID1 */
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{135, Function1, 0 },
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/* TPM_SERIRQ# */
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{139, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* BD_ID2 */
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{140, Function1, 0 },
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/* APU_SPI_WP */
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{142, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* BD_ID3 */
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{144, Function1, 0 },
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{-1}
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};
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static AGESA_STATUS fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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static AGESA_STATUS fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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{
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{
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@ -0,0 +1,94 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <AGESA.h>
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#include <FchPlatform.h>
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#include <soc/hudson.h>
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#include <stdlib.h>
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const GPIO_CONTROL oem_kahlee_gpio[] = {
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/* SER TX */
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{8, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* SER RX */
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{9, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* AGPIO 12 */
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{12, Function2, FCH_GPIO_PULL_UP_ENABLE },
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/* TS_EN_SOC (TouchScreen enable GPIO) */
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{13, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* CAM_PWRON (Camera enable GPIO) */
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{14, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* EC_IN_RW */
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{15, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* APU_I2C_3_SCL */
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{19, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* APU_I2C_3_SDA */
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{20, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* APU_BT_ON# */
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{24, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* DEVSLP1_SSD */
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{67, Function1, FCH_GPIO_PULL_UP_ENABLE},
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/* DEVSLP1_EMMC */
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/* No Connect for now.
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* {70, Function1, FCH_GPIO_PULL_UP_ENABLE},
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*/
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/* SPI_TPM_CS_L */
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{76, Function1, FCH_GPIO_PULL_DOWN_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* CAM_LED# */
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{84, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* TS_RST# (TouchScreen Reset) */
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{85, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* WLAN_RST#_AUX */
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{119, Function2, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE
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| FCH_GPIO_OUTPUT_ENABLE},
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/* BD_ID1 */
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{135, Function1, 0 },
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/* TPM_SERIRQ# */
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{139, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* BD_ID2 */
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{140, Function1, 0 },
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/* APU_SPI_WP */
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{142, Function1, FCH_GPIO_PULL_UP_ENABLE },
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/* BD_ID3 */
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{144, Function1, 0 },
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{-1}
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};
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