From 5f4ae427edaef5e6c7dd2f22b574041d9d5dcb36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 16 Oct 2021 13:35:04 +0300 Subject: [PATCH] cpu/intel/hyperthreading: Use CPUID leaf 0xb without X2APIC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is not a requirement to have X2APIC mode enabled to use CPUID leaf 0xb EDX to detect logical CPU is a hyperthreading sibling. Change-Id: I288f2df5a392c396f92bb6d18908df35de55915d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/58383 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/cpu/intel/common/hyperthreading.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/cpu/intel/common/hyperthreading.c b/src/cpu/intel/common/hyperthreading.c index b9c17b6fa1..2936770cc3 100644 --- a/src/cpu/intel/common/hyperthreading.c +++ b/src/cpu/intel/common/hyperthreading.c @@ -23,12 +23,10 @@ bool intel_ht_sibling(void) if (!intel_ht_supported()) return false; - if (is_x2apic_mode()) { - if (cpuid_eax(0) >= 0xb) { - result = cpuid_ext(0xb, 0); - const uint32_t div = 1 << (result.eax & 0x1f); - return result.edx % div > 0; - } + if (cpuid_eax(0) >= 0xb) { + result = cpuid_ext(0xb, 0); + const uint32_t div = 1 << (result.eax & 0x1f); + return result.edx % div > 0; } apic_ids = 1;