arch/x86: Add bootblock and postcar support for SOC MTRR access

Quark does not support the rdmsr and wrmsr instructions.  Use SOC
specific routines to configure the MTRRs on Quark based platforms.
Add cpu_common.c as a build dependency to provide access to the routine
cpu_phys_address_size.

TEST=Build and run on Galileo Gen2

Change-Id: I43b7067c66c5c55b42097937e862078adf17fb19
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15846
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/arch/x86/Makefile.inc

@@ -95,6 +95,7 @@ endef
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
 
 bootblock-y += boot.c
+bootblock-y += cpu_common.c
 bootblock-y += memcpy.c
 bootblock-y += memset.c
 bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -279,6 +280,7 @@ postcar-generic-ccopts += -D__POSTCAR__
 
 postcar-y += boot.c
 postcar-y += cbfs_and_run.c
+postcar-y += cpu_common.c
 postcar-y += exit_car.S
 postcar-y += memcpy.c
 postcar-y += memmove.c

src/arch/x86/exit_car.S

@@ -54,6 +54,14 @@ _start:
 	 *   0x00: Number of variable MTRRs to clear
 	 */
 
+#if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
+	push	%esp
+	call	soc_set_mtrrs
+
+	/* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
+	movl	%eax, %esp
+	call	soc_enable_mtrrs
+#else /* CONFIG_SOC_SETS_MSRS */
 	/* Clear variable MTRRs. */
 	pop	%ebx	/* Number to clear */
 	test	%ebx, %ebx
@@ -98,6 +106,7 @@ _start:
 	and	$(~(MTRR_DEF_TYPE_MASK)), %eax
 	or	$(MTRR_DEF_TYPE_EN), %eax
 	wrmsr
+#endif /* CONFIG_SOC_SETS_MSRS */
 
 	/* Load and run ramstage. */
 	call	copy_and_run