diff --git a/src/southbridge/intel/common/smbus_ops.c b/src/southbridge/intel/common/smbus_ops.c index b0ecc1a59c..46fc58ab0a 100644 --- a/src/southbridge/intel/common/smbus_ops.c +++ b/src/southbridge/intel/common/smbus_ops.c @@ -67,17 +67,12 @@ struct smbus_bus_operations lops_smbus_bus = { void smbus_read_resources(struct device *dev) { + pci_dev_read_resources(dev); + struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); res->base = CONFIG_FIXED_SMBUS_IO_BASE; res->size = 32; res->limit = res->base + res->size - 1; res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; - - /* The memory BAR does not exist for ICH7 and earlier */ - if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) - return; - - /* Also add MMIO resource */ - res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); }