spike-riscv: Look for the CBFS in RAM

Change-Id: I98927a70adc45d9aca916bd985932b94287921de
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15285
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Jonathan Neuschäfer 2016-07-07 20:53:28 +02:00 committed by Ronald G. Minnich
parent 8aa8caf191
commit 5f8cb140e6
5 changed files with 36 additions and 3 deletions

View File

@ -33,7 +33,6 @@ bootblock-y += trap_util.S
bootblock-y += trap_handler.c
bootblock-y += virtual_memory.c
bootblock-y += boot.c
bootblock-y += rom_media.c
bootblock-y += misc.c
bootblock-y += \
$(top)/src/lib/memchr.c \
@ -60,7 +59,6 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
romstage-y += boot.c
romstage-y += stages.c
romstage-y += rom_media.c
romstage-y += misc.c
romstage-y += \
$(top)/src/lib/memchr.c \
@ -90,7 +88,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y)
ramstage-y =
ramstage-y += trap_handler.c
ramstage-y += virtual_memory.c
ramstage-y += rom_media.c
ramstage-y += stages.c
ramstage-y += misc.c
ramstage-y += boot.c

View File

@ -15,11 +15,14 @@
bootblock-y += bootblock.c
bootblock-y += uart.c
bootblock-y += qemu_util.c
bootblock-y += rom_media.c
romstage-y += romstage.c
romstage-y += qemu_util.c
romstage-y += uart.c
romstage-y += rom_media.c
ramstage-y += uart.c
ramstage-y += qemu_util.c
ramstage-y += rom_media.c
bootblock-y += memlayout.ld
romstage-y += memlayout.ld

View File

@ -15,11 +15,14 @@
bootblock-y += bootblock.c
bootblock-y += uart.c
bootblock-y += spike_util.c
bootblock-y += rom_media.c
romstage-y += romstage.c
romstage-y += uart.c
romstage-y += spike_util.c
romstage-y += rom_media.c
ramstage-y += uart.c
ramstage-y += spike_util.c
ramstage-y += rom_media.c
bootblock-y += memlayout.ld
romstage-y += memlayout.ld

View File

@ -0,0 +1,30 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
* Copyright 2016 Jonathan Neuschäfer <j.neuschaefer@gmx.net>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <boot_device.h>
/*
* 0x80000000 is this start of RAM. We currently need to load coreboot.rom into
* RAM on SPIKE, because SPIKE doesn't support loading custom code into the
* boot ROM.
*/
static const struct mem_region_device boot_dev =
MEM_REGION_DEV_RO_INIT(0x80000000, CONFIG_ROM_SIZE);
const struct region_device *boot_device_ro(void)
{
return &boot_dev.rdev;
}