lib/spd_bin: Use proper I2C addresses
Use the plain address instead of the weird shifted encoding (e.g. if we'd use `0xa0` as address, it's actually `0x50` encoded into a write command). Change-Id: I6febb2e04e1c6de4294dfa37bde16b147a80b7a8 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20405 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -43,7 +43,7 @@
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#define LPDDR4_SPD_PART_LEN 20
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#define LPDDR4_SPD_PART_LEN 20
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struct spd_block {
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struct spd_block {
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u8 addr_map[CONFIG_DIMM_MAX];
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u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */
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u8 *spd_array[CONFIG_DIMM_MAX];
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u8 *spd_array[CONFIG_DIMM_MAX];
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/* Length of each dimm */
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/* Length of each dimm */
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u16 len;
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u16 len;
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@ -128,8 +128,6 @@ int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index)
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static void get_spd(u8 *spd, u8 addr)
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static void get_spd(u8 *spd, u8 addr)
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{
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{
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u16 i;
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u16 i;
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/* Assuming addr is 8 bit address, make it 7 bit */
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addr = addr >> 1;
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if (smbus_read_byte(0, addr, 0) == 0xff) {
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if (smbus_read_byte(0, addr, 0) == 0xff) {
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printk(BIOS_INFO, "No memory dimm at address %02X\n",
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printk(BIOS_INFO, "No memory dimm at address %02X\n",
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addr << 1);
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addr << 1);
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@ -32,7 +32,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
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/* Read spd block to get memory config */
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/* Read spd block to get memory config */
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struct spd_block blk = {
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struct spd_block blk = {
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.addr_map = { 0xa0, 0xa4, },
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.addr_map = { 0x50, 0x52, },
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};
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};
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mem_cfg->DqPinsInterleaved = 1;
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mem_cfg->DqPinsInterleaved = 1;
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get_spd_smbus(&blk);
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get_spd_smbus(&blk);
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@ -51,7 +51,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
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mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
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mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
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} else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */
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} else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */
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struct spd_block blk = {
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struct spd_block blk = {
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.addr_map = { 0xa0, 0xa2, 0xa4, 0xa6, },
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.addr_map = { 0x50, 0x51, 0x52, 0x53, },
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};
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};
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mem_cfg->DqPinsInterleaved = 1;
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mem_cfg->DqPinsInterleaved = 1;
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@ -35,7 +35,7 @@ void mainboard_memory_init_params(struct romstage_params *params,
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MEMORY_INIT_UPD *memory_params)
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MEMORY_INIT_UPD *memory_params)
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{
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{
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struct spd_block blk = {
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struct spd_block blk = {
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.addr_map = { 0xa0 },
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.addr_map = { 0x50 },
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};
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};
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memory_params->DqPinsInterleaved = 1;
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memory_params->DqPinsInterleaved = 1;
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